PreviousNext
TR Configuration
Help > TR Configuration

TR configuration is stored in the MCU Flash memory. It is necessary to correctly configure the device before DPA is used for the first time. The configuration can be modified by IQRF IDE using SPI or RFPGM programming, by DPA Service Mode, or by Read TR Configuration/Write TR Configuration/Write TR Configuration byte commands. There are predefined symbols CFGIND_??? having the address of each configuration byte.

 

The following table depicts documented configuration items. Other items are reserved or undocumented. The total size of the configuration block is 32 bytes.

 

Address

Description

0x00

The checksum of the TR Configuration block. See Read TR Configuration for details.

0x01 [**]

An array of 32 bits. Each bit enables/disables one of the embedded 32 predefined peripherals. Peripheral #0 (Coordinator) is represented by bit 0.0, peripheral #31 (currently not used, but reserved) is controlled by bit 3.7. It does not make sense to enable the peripheral that is not implemented in the currently used device (see Peripheral enumeration).

0x02 [**]

0x03 [**]

0x04 [**]

0x05 [*]

DPA configuration bits #0:

  bit 0

If set, then a Custom DPA handler is called in case of an event. The handler can define user peripherals, handle messages to embedded peripherals, and add special user‑defined device behavior. If set and the Custom DPA handler is not detected the device indicates an error state. Find more information at the Custom DPA Handler chapter.

  bit 1

If set, then DP2P is enabled at [N].

  bit 2

Reserved.

  bit 3

If set, then the [N] does not route packets in the background.

  bit 4

If set, then DPA IO Setup is run at an early stage of the module boot time.

  bit 5

If set, the device receives also peer-to-peer (non-networking) packets and raises the PeerToPeer event.

  bit 6

If set, then unbonded [N] using default IQRF buttons never sleeps during the button bonding.

  bit 7

If the bit is set, then the [C] controls the STD+LP network; otherwise, it controls the STD network. The bit can only be changed if the network is empty (no [Ns] are bonded) otherwise the network will stop working.

0x08

RF output power. Valid numbers are 0-7. Setting this item does not have an immediate effect except these moments:

1.     at Startup,

2.     after discovery (both at [C] and [N]),

3.     at DpaApiSetRfDefaults API and

4.     after DP2P communication.

 

Use the setRFpower IQRF OS function to set the power at runtime.

0x09

RF signal filter. Valid numbers 0-64. Setting this item does not have an immediate effect except these moments:

1.     at Startup,

2.     at DpaApiSetRfDefaults API and

3.     after DP2P communication.

 

Also, see API variable RxFilter.

0x0A [*]

Timeout for receiving RF packets at LP-RX mode at LP [N]. The unit is one cycle (one cycle is 46 ms at LP-RX mode). Greater values save energy but might decrease responsiveness to the master interface DPA Requests and also decrease Idle event calling frequency. The valid numbers are 1-255. See also API variable LPtoutRF.

0x0B [*]

Baud rate of the UART interface or the UART peripheral. Uses the same baud rate coding as UART Open (i.e. 0x06 = 57 600 Baud)

0x0C

A nonzero value specifies an alternative DPA service mode channel.

0x0D

DPA configuration bits #1:

  bit 0

If set, then Local FRC reception is enabled at [N].

  bits 1-7

Reserved.

0x11

Main RF channel A of the main network. Valid numbers depend on the used RF band. Setting this item does not have an immediate effect at [C] or [N] devices except Startup. Use the setRFchannel IQRF OS function to change the RF channel at runtime.

 

When the [N] is bonded using the traditional bonding or the Smart Connect the channel is automatically inherited from the network member that provided the bonding and then written to the configuration.

0x12

Same as above but the second B channel.

 

[*]         The device must be restarted for configuration item change to take effect.

[**]       Same as [*] but only in the case of UART embedded peripheral bit.