UART is configured with 8 data bits, 1 stop bit, and no parity bit. UART baud rate is specified at TR Configuration. The size of both RX and TX buffers is 64 bytes.
HDLC byte stuffing protocol is used to frame, protect, and encode DPA messages. Every data frame (DPA message) starts and ends with byte 0x7e (Flag Sequence). When the actual data byte (applies to 8-bit CRC value too) equals 0x7e (Flag Sequence) or 0x7d (Control Escape) then it is replaced by two bytes: the 1st byte is 0x7d (Control Escape) and the 2nd byte equals the original byte value XORed by 0x20 (Escape Bit).
An 8-bit CRC is used to protect data. The CRC value is appended after all data bytes and it is coded by the same HDLC byte stuffing algorithm. CRC is compatible with 1-Wire CRC with an initial value 0xFF, the polynomial is x8+x5+x4+1. See CRC Calculation for the implementations of the CRC algorithm. There is also an online calculator available.
Example
The example shows encoded DPA Request “write bytes 0x7E, 0x7D at the RAM address 0 at [N] with address 0x2F”:
NADR=0x002F(Node address), PNUM=0x05(RAM peripheral), PCMD=0x01(RAM write), HWPID=0xFFFF, PData={0x00}(address), {0x7E,0x7D}(bytes to write)
CRC from bytes {0x2f, 0x00, 0x05, 0x01, 0xff, 0xff, 0x00, 0x7e, 0x7d} = 0x7e
|
Data in index |
|
0 |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
CRC |
|
|||
|
Data in |
0x2f |
0x00 |
0x05 |
0x01 |
0xff |
0xff |
0x00 |
0x7e |
0x7d |
0x7e |
|||||
|
Data out index |
0 |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
8 |
9 |
10 |
11 |
12 |
13 |
14 |
|
Data out |
0x7e |
0x2f |
0x00 |
0x05 |
0x01 |
0xff |
0xff |
0x00 |
0x7d |
0x5e |
0x7d |
0x5d |
0x7d |
0x5e |
0x7e |
|
Note |
Flag Sequence |
original byte |
original byte |
original byte |
original byte |
original byte |
original byte |
original byte |
Control Escape |
0x7e XOR 0x20 |
Control Escape |
0x7d XOR 0x20 |
Control Escape |
0x7e XOR 0x20 |
Flag Sequence |