1 // *********************************************************************
    2 //                         IQRF OS functions                           *
    3 // *********************************************************************
    4 //
    5 // Online IQRF OS Reference Guide: http://www.iqrf.org/IQRF-OS-Reference-guide/
    6 //
    7 // Copyright (c) MICRORISC s.r.o.
    8 //
    9 // Intended for:
   10 //   HW: TR-72D, TR-76D, TR-77D, TR-78D, TR-75D, TR-72G, TR-76G, TR-82G
   11 //   OS: 4.06D, 4.06G
   12 //
   13 // File:    IQRF-functions.h
   14 // Version: v1.00                                   Revision: 25/02/2022
   15 //
   16 // Revision history:
   17 //   v1.00: 25/02/2022  First release for OS 4.06D and 4.06G.
   18 //
   19 // *********************************************************************
   20 
   21 #pragma optimize 0
   22 #pragma update_PAGE 0
   23 #pragma update_RP 0
   24 
   25 // Identification header for internal use only
   26 #pragma cdata[0x3800] = OS_VERSION /* OS Version */, MCU_ID /* MCU ID */, TR_FAMILY | 0x80 /*TR Family*/
   27 
   28 #define dummy_address   0x3810
   29 #pragma origin dummy_address
   30 void dummy()
   31 {
   32   #asm
   33     DW 0x2000
   34   #endasm
   35   #pragma updateBank exit=UserBank_01
   36 }
   37 
   38 #define iqrfSleep_address   0x3816
   39 #pragma origin iqrfSleep_address
   40 void iqrfSleep()
   41 {
   42   #asm
   43     DW 0x2000
   44   #endasm
   45   #pragma updateBank exit=UserBank_01
   46 }
   47 
   48 #define _debug_address  0x3819
   49 #pragma origin _debug_address
   50 void _debug()
   51 {
   52   #asm
   53     DW 0x2000
   54   #endasm
   55   #pragma updateBank exit=UserBank_01
   56 }
   57 
   58 #define debug()     \
   59     do {            \
   60         _debug();   \
   61         nop();      \
   62     } while (0)
   63 
   64 #define moduleInfo_address  0x381c
   65 #pragma origin moduleInfo_address
   66 void moduleInfo()
   67 {
   68   #asm
   69     DW 0x2000
   70   #endasm
   71   #pragma updateBank exit=UserBank_01
   72 }
   73 
   74 #define pulsingLEDR_address 0x3822
   75 #pragma origin pulsingLEDR_address
   76 void pulsingLEDR()
   77 {
   78   #asm
   79     DW 0x2000
   80   #endasm
   81   #pragma updateBank exit=UserBank_01
   82 }
   83 
   84 #define pulseLEDR_address   0x3825
   85 #pragma origin pulseLEDR_address
   86 void pulseLEDR()
   87 {
   88   #asm
   89     DW 0x2000
   90   #endasm
   91   #pragma updateBank exit=UserBank_01
   92 }
   93 
   94 #define stopLEDR_address    0x3828
   95 #pragma origin stopLEDR_address
   96 void stopLEDR()
   97 {
   98   #asm
   99     DW 0x2000
  100   #endasm
  101   #pragma updateBank exit=UserBank_01
  102 }
  103 
  104 #define pulsingLEDG_address 0x382b
  105 #pragma origin pulsingLEDG_address
  106 void pulsingLEDG()
  107 {
  108   #asm
  109     DW 0x2000
  110   #endasm
  111   #pragma updateBank exit=UserBank_01
  112 }
  113 
  114 #define pulseLEDG_address   0x382e
  115 #pragma origin pulseLEDG_address
  116 void pulseLEDG()
  117 {
  118   #asm
  119     DW 0x2000
  120   #endasm
  121   #pragma updateBank exit=UserBank_01
  122 }
  123 
  124 #define stopLEDG_address    0x3831
  125 #pragma origin stopLEDG_address
  126 void stopLEDG()
  127 {
  128   #asm
  129     DW 0x2000
  130   #endasm
  131   #pragma updateBank exit=UserBank_01
  132 }
  133 
  134 #define setOnPulsingLED_address 0x3834
  135 #pragma origin setOnPulsingLED_address
  136 void setOnPulsingLED(uns8 ticks @ W)
  137 {
  138   #asm
  139     DW 0x2000
  140   #endasm
  141   #pragma updateBank exit=UserBank_01
  142 }
  143 
  144 #define setOffPulsingLED_address    0x3837
  145 #pragma origin setOffPulsingLED_address
  146 void setOffPulsingLED(uns8 ticks @ W)
  147 {
  148   #asm
  149     DW 0x2000
  150   #endasm
  151   #pragma updateBank exit=UserBank_01
  152 }
  153 
  154 #define eeReadByte_address  0x383a
  155 #pragma origin eeReadByte_address
  156 uns8 eeReadByte(uns8 address @ W)
  157 {
  158   #asm
  159     DW 0x2000
  160   #endasm
  161   #pragma updateBank exit=UserBank_01
  162   return W;
  163 }
  164 
  165 #define eeReadData_address  0x383d
  166 #pragma origin eeReadData_address
  167 bit eeReadData(uns8 address @ param2, uns8 length @ W)
  168 {
  169   #asm
  170     DW 0x2000
  171   #endasm
  172   #pragma updateBank exit=UserBank_01
  173   return Carry;
  174 }
  175 
  176 #define eeWriteByte_address 0x3840
  177 #pragma origin eeWriteByte_address
  178 void eeWriteByte(uns8 address @ param2, uns8 data @ W)
  179 {
  180   #asm
  181     DW 0x2000
  182   #endasm
  183   #pragma updateBank exit=UserBank_01
  184 }
  185 
  186 #define eeWriteData_address 0x3843
  187 #pragma origin eeWriteData_address
  188 void eeWriteData(uns8 address @ param2, uns8 length @ W)
  189 {
  190   #asm
  191     DW 0x2000
  192   #endasm
  193   #pragma updateBank exit=UserBank_01
  194 }
  195 
  196 #define readFromRAM_address 0x3846
  197 #pragma origin readFromRAM_address
  198 uns8 readFromRAM(uns16 address @ FSR0)
  199 {
  200   #asm
  201     DW 0x2000
  202   #endasm
  203   #pragma updateBank exit=UserBank_01
  204   return W;
  205 }
  206 
  207 #define clearBufferINFO_address 0x384c
  208 #pragma origin clearBufferINFO_address
  209 void clearBufferINFO()
  210 {
  211   #asm
  212     DW 0x2000
  213   #endasm
  214   #pragma updateBank exit=UserBank_01
  215 }
  216 
  217 #define swapBufferINFO_address  0x384f
  218 #pragma origin swapBufferINFO_address
  219 void swapBufferINFO()
  220 {
  221   #asm
  222     DW 0x2000
  223   #endasm
  224   #pragma updateBank exit=UserBank_01
  225 }
  226 
  227 #define compareBufferINFO2RF_address    0x3852
  228 #pragma origin compareBufferINFO2RF_address
  229 bit compareBufferINFO2RF(uns8 length @ W)
  230 {
  231   #asm
  232     DW 0x2000
  233   #endasm
  234   #pragma updateBank exit=UserBank_01
  235   return Carry;
  236 }
  237 
  238 #define copyBufferINFO2COM_address  0x3855
  239 #pragma origin copyBufferINFO2COM_address
  240 void copyBufferINFO2COM()
  241 {
  242   #asm
  243     DW 0x2000
  244   #endasm
  245   #pragma updateBank exit=UserBank_01
  246 }
  247 
  248 #define copyBufferINFO2RF_address   0x3858
  249 #pragma origin copyBufferINFO2RF_address
  250 void copyBufferINFO2RF()
  251 {
  252   #asm
  253     DW 0x2000
  254   #endasm
  255   #pragma updateBank exit=UserBank_01
  256 }
  257 
  258 #define copyBufferRF2COM_address    0x385b
  259 #pragma origin copyBufferRF2COM_address
  260 void copyBufferRF2COM()
  261 {
  262   #asm
  263     DW 0x2000
  264   #endasm
  265   #pragma updateBank exit=UserBank_01
  266 }
  267 
  268 #define copyBufferRF2INFO_address   0x385e
  269 #pragma origin copyBufferRF2INFO_address
  270 void copyBufferRF2INFO()
  271 {
  272   #asm
  273     DW 0x2000
  274   #endasm
  275   #pragma updateBank exit=UserBank_01
  276 }
  277 
  278 #define copyBufferCOM2RF_address    0x3861
  279 #pragma origin copyBufferCOM2RF_address
  280 void copyBufferCOM2RF()
  281 {
  282   #asm
  283     DW 0x2000
  284   #endasm
  285   #pragma updateBank exit=UserBank_01
  286 }
  287 
  288 #define copyBufferCOM2INFO_address  0x3864
  289 #pragma origin copyBufferCOM2INFO_address
  290 void copyBufferCOM2INFO()
  291 {
  292   #asm
  293     DW 0x2000
  294   #endasm
  295   #pragma updateBank exit=UserBank_01
  296 }
  297 
  298 #define copyMemoryBlock_address 0x3867
  299 #pragma origin copyMemoryBlock_address
  300 void copyMemoryBlock(uns16 from @ FSR0, uns16 to @ FSR1, uns8 length @ W)
  301 {
  302   #asm
  303     DW 0x2000
  304   #endasm
  305  #pragma updateBank exit=UserBank_01
  306 }
  307 
  308 #define startDelay_address  0x386a
  309 #pragma origin startDelay_address
  310 void startDelay(uns8 ticks @ W)
  311 {
  312   #asm
  313     DW 0x2000
  314   #endasm
  315   #pragma updateBank exit=UserBank_01
  316 }
  317 
  318 #define startLongDelay_address  0x386d
  319 #pragma origin startLongDelay_address
  320 void startLongDelay(uns16 ticks @ param3)
  321 {
  322   #asm
  323     DW 0x2000
  324   #endasm
  325   #pragma updateBank exit=UserBank_01
  326 }
  327 
  328 #define isDelay_address 0x3870
  329 #pragma origin isDelay_address
  330 bit isDelay()
  331 {
  332   #asm
  333     DW 0x2000
  334   #endasm
  335   #pragma updateBank exit=UserBank_01
  336   return Carry;
  337 }
  338 
  339 #define waitDelay_address   0x3873
  340 #pragma origin waitDelay_address
  341 void waitDelay(uns8 ticks @ W)
  342 {
  343   #asm
  344     DW 0x2000
  345   #endasm
  346   #pragma updateBank exit=UserBank_01
  347 }
  348 
  349 #define waitMS_address  0x3876
  350 #pragma origin waitMS_address
  351 void waitMS(uns8 ms @ W)
  352 {
  353   #asm
  354     DW 0x2000
  355   #endasm
  356   #pragma updateBank exit=UserBank_01
  357 }
  358 
  359 #define startCapture_address    0x3879
  360 #pragma origin startCapture_address
  361 void startCapture()
  362 {
  363   #asm
  364     DW 0x2000
  365   #endasm
  366   #pragma updateBank exit=UserBank_01
  367 }
  368 
  369 #define captureTicks_address    0x387c
  370 #pragma origin captureTicks_address
  371 void captureTicks()
  372 {
  373   #asm
  374     DW 0x2000
  375   #endasm
  376   #pragma updateBank exit=UserBank_01
  377 }
  378 
  379 #define waitNewTick_address 0x3882
  380 #pragma origin waitNewTick_address
  381 void waitNewTick()
  382 {
  383   #asm
  384     DW 0x2000
  385   #endasm
  386   #pragma updateBank exit=UserBank_01
  387 }
  388 
  389 #define enableSPI_address   0x3885
  390 #pragma origin enableSPI_address
  391 void enableSPI()
  392 {
  393   #asm
  394     DW 0x2000
  395   #endasm
  396   #pragma updateBank exit=UserBank_01
  397 }
  398 
  399 #define disableSPI_address  0x3888
  400 #pragma origin disableSPI_address
  401 void disableSPI()
  402 {
  403   #asm
  404     DW 0x2000
  405   #endasm
  406   #pragma updateBank exit=UserBank_01
  407 }
  408 
  409 #define startSPI_address    0x388b
  410 #pragma origin startSPI_address
  411 void startSPI(uns8 length @ W)
  412 {
  413   #asm
  414     DW 0x2000
  415   #endasm
  416   #pragma updateBank exit=UserBank_01
  417 }
  418 
  419 #define stopSPI_address 0x388e
  420 #pragma origin stopSPI_address
  421 void stopSPI()
  422 {
  423   #asm
  424     DW 0x2000
  425   #endasm
  426   #pragma updateBank exit=UserBank_01
  427 }
  428 
  429 #define restartSPI_address  0x3891
  430 #pragma origin restartSPI_address
  431 void restartSPI()
  432 {
  433   #asm
  434     DW 0x2000
  435   #endasm
  436   #pragma updateBank exit=UserBank_01
  437 }
  438 
  439 #define getStatusSPI_address    0x3894
  440 #pragma origin getStatusSPI_address
  441 bit getStatusSPI()
  442 {
  443   #asm
  444     DW 0x2000
  445   #endasm
  446   #pragma updateBank exit=UserBank_01
  447   return Carry;
  448 }
  449 
  450 #define setRFpower_address  0x3897
  451 #pragma origin setRFpower_address
  452 void setRFpower(uns8 level @ W)
  453 {
  454   #asm
  455     DW 0x2000
  456   #endasm
  457   #pragma updateBank exit=UserBank_01
  458 }
  459 
  460 #define setLEDG_address 0x389a
  461 #pragma origin setLEDG_address
  462 void setLEDG()
  463 {
  464   #asm
  465     DW 0x2000
  466   #endasm
  467   #pragma updateBank exit=UserBank_01
  468 }
  469 
  470 #define setRFchannel_address    0x389d
  471 #pragma origin setRFchannel_address
  472 void setRFchannel(uns8 channel @ W)
  473 {
  474   #asm
  475     DW 0x2000
  476   #endasm
  477   #pragma updateBank exit=UserBank_01
  478 }
  479 
  480 #define setRFmode_address   0x38a0
  481 #pragma origin setRFmode_address
  482 void setRFmode(uns8 mode @ W)
  483 {
  484   #asm
  485     DW 0x2000
  486   #endasm
  487   #pragma updateBank exit=UserBank_01
  488 }
  489 
  490 #define setRFspeed_address  0x38a3
  491 #pragma origin setRFspeed_address
  492 void setRFspeed(uns8 speed @ W)
  493 {
  494   #asm
  495     DW 0x2000
  496   #endasm
  497   #pragma updateBank exit=UserBank_01
  498 }
  499 
  500 #define setRFsleep_address  0x38a6
  501 #pragma origin setRFsleep_address
  502 void setRFsleep()
  503 {
  504   #asm
  505     DW 0x2000
  506   #endasm
  507   #pragma updateBank exit=UserBank_01
  508 }
  509 
  510 #define setRFready_address  0x38a9
  511 #pragma origin setRFready_address
  512 void setRFready()
  513 {
  514   #asm
  515     DW 0x2000
  516   #endasm
  517   #pragma updateBank exit=UserBank_01
  518 }
  519 
  520 #define RFTXpacket_address  0x38ac
  521 #pragma origin RFTXpacket_address
  522 void RFTXpacket()
  523 {
  524   #asm
  525     DW 0x2000
  526   #endasm
  527   #pragma updateBank exit=UserBank_01
  528 }
  529 
  530 #define RFRXpacket_address  0x38af
  531 #pragma origin RFRXpacket_address
  532 bit RFRXpacket()
  533 {
  534   #asm
  535     DW 0x2000
  536   #endasm
  537   #pragma updateBank exit=UserBank_01
  538   return Carry;
  539 }
  540 
  541 #define checkRF_address 0x38b2
  542 #pragma origin checkRF_address
  543 bit checkRF(uns8 level @ W)
  544 {
  545   #asm
  546     DW 0x2000
  547   #endasm
  548   #pragma updateBank exit=UserBank_01
  549   return Carry;
  550 }
  551 
  552 #define amIBonded_address   0x38b8
  553 #pragma origin amIBonded_address
  554 bit amIBonded()
  555 {
  556   #asm
  557     DW 0x2000
  558   #endasm
  559   #pragma updateBank exit=UserBank_01
  560   return Carry;
  561 }
  562 
  563 #define removeBond_address  0x38bb
  564 #pragma origin removeBond_address
  565 void removeBond()
  566 {
  567   #asm
  568     DW 0x2000
  569   #endasm
  570   #pragma updateBank exit=UserBank_01
  571 }
  572 
  573 #define bondNewNode_address 0x38be
  574 #pragma origin bondNewNode_address
  575 bit bondNewNode(uns8 address @ W)
  576 {
  577   #asm
  578     DW 0x2000
  579   #endasm
  580   #pragma updateBank exit=UserBank_01
  581   return Carry;
  582 }
  583 
  584 #define isBondedNode_address    0x38c1
  585 #pragma origin isBondedNode_address
  586 bit isBondedNode(uns8 address @ W)
  587 {
  588   #asm
  589     DW 0x2000
  590   #endasm
  591   #pragma updateBank exit=UserBank_01
  592   return Carry;
  593 }
  594 
  595 #define removeBondedNode_address    0x38c4
  596 #pragma origin removeBondedNode_address
  597 void removeBondedNode(uns8 address @ W)
  598 {
  599   #asm
  600     DW 0x2000
  601   #endasm
  602   #pragma updateBank exit=UserBank_01
  603 }
  604 
  605 #define rebondNode_address  0x38c7
  606 #pragma origin rebondNode_address
  607 bit rebondNode(uns8 address @ W)
  608 {
  609   #asm
  610     DW 0x2000
  611   #endasm
  612   #pragma updateBank exit=UserBank_01
  613   return Carry;
  614 }
  615 
  616 #define clearAllBonds_address   0x38ca
  617 #pragma origin clearAllBonds_address
  618 void clearAllBonds()
  619 {
  620   #asm
  621     DW 0x2000
  622   #endasm
  623   #pragma updateBank exit=UserBank_01
  624 }
  625 
  626 #define setNonetMode_address    0x38cd
  627 #pragma origin setNonetMode_address
  628 void setNonetMode()
  629 {
  630   #asm
  631     DW 0x2000
  632   #endasm
  633   #pragma updateBank exit=UserBank_01
  634 }
  635 
  636 #define setCoordinatorMode_address  0x38d0
  637 #pragma origin setCoordinatorMode_address
  638 void setCoordinatorMode()
  639 {
  640   #asm
  641     DW 0x2000
  642   #endasm
  643   #pragma updateBank exit=UserBank_01
  644 }
  645 
  646 #define setNodeMode_address 0x38d3
  647 #pragma origin setNodeMode_address
  648 void setNodeMode()
  649 {
  650   #asm
  651     DW 0x2000
  652   #endasm
  653   #pragma updateBank exit=UserBank_01
  654 }
  655 
  656 #define setNetworkFilteringOn_address   0x38d6
  657 #pragma origin setNetworkFilteringOn_address
  658 void setNetworkFilteringOn()
  659 {
  660   #asm
  661     DW 0x2000
  662   #endasm
  663   #pragma updateBank exit=UserBank_01
  664 }
  665 
  666 #define setNetworkFilteringOff_address  0x38d9
  667 #pragma origin setNetworkFilteringOff_address
  668 void setNetworkFilteringOff()
  669 {
  670   #asm
  671     DW 0x2000
  672   #endasm
  673   #pragma updateBank exit=UserBank_01
  674 }
  675 
  676 #define getNetworkParams_address    0x38dc
  677 #pragma origin getNetworkParams_address
  678 uns8 getNetworkParams()
  679 {
  680   #asm
  681     DW 0x2000
  682   #endasm
  683   #pragma updateBank exit=UserBank_01
  684   return W;
  685 }
  686 
  687 #define setRoutingOn_address    0x38df
  688 #pragma origin setRoutingOn_address
  689 void setRoutingOn()
  690 {
  691   #asm
  692     DW 0x2000
  693   #endasm
  694   #pragma updateBank exit=UserBank_01
  695 }
  696 
  697 #define setRoutingOff_address   0x38e2
  698 #pragma origin setRoutingOff_address
  699 void setRoutingOff()
  700 {
  701   #asm
  702     DW 0x2000
  703   #endasm
  704   #pragma updateBank exit=UserBank_01
  705 }
  706 
  707 #define answerSystemPacket_address  0x38e8
  708 #pragma origin answerSystemPacket_address
  709 void answerSystemPacket()
  710 {
  711   #asm
  712     DW 0x2000
  713   #endasm
  714   #pragma updateBank exit=UserBank_01
  715 }
  716 
  717 #define discovery_address   0x38eb
  718 #pragma origin discovery_address
  719 uns8 discovery(uns8 MaxNodeAddress @ W)
  720 {
  721   #asm
  722     DW 0x2000
  723   #endasm
  724   #pragma updateBank exit=UserBank_01
  725   return W;
  726 }
  727 
  728 #define wasRouted_address   0x38ee
  729 #pragma origin wasRouted_address
  730 bit wasRouted()
  731 {
  732   #asm
  733     DW 0x2000
  734   #endasm
  735   #pragma updateBank exit=UserBank_01
  736   return Carry;
  737 }
  738 
  739 #define optimizeHops_address    0x38f1
  740 #pragma origin optimizeHops_address
  741 bit optimizeHops(uns8 method @ W)
  742 {
  743   #asm
  744     DW 0x2000
  745   #endasm
  746   #pragma updateBank exit=UserBank_01
  747   return Carry;
  748 }
  749 
  750 #define getSupplyVoltage_address    0x38f4
  751 #pragma origin getSupplyVoltage_address
  752 uns8 getSupplyVoltage()
  753 {
  754   #asm
  755     DW 0x2000
  756   #endasm
  757   #pragma updateBank exit=UserBank_01
  758   return W;
  759 }
  760 
  761 #define getTemperature_address  0x38f7
  762 #pragma origin getTemperature_address
  763 int8 getTemperature()
  764 {
  765   #asm
  766     DW 0x2000
  767   #endasm
  768   #pragma updateBank exit=UserBank_01
  769   return W;
  770 }
  771 
  772 #define clearBufferRF_address   0x38fa
  773 #pragma origin clearBufferRF_address
  774 void clearBufferRF()
  775 {
  776   #asm
  777     DW 0x2000
  778   #endasm
  779   #pragma updateBank exit=UserBank_01
  780 }
  781 
  782 #define isDiscoveredNode_address    0x3910
  783 #pragma origin isDiscoveredNode_address
  784 bit isDiscoveredNode(uns8 address @ W)
  785 {
  786   #asm
  787     DW 0x2000
  788   #endasm
  789   #pragma updateBank exit=UserBank_01
  790   return Carry;
  791 }
  792 
  793 #define enableRFPGM_address 0x3913
  794 #pragma origin enableRFPGM_address
  795 void enableRFPGM()
  796 {
  797   #asm
  798     DW 0x2000
  799   #endasm
  800   #pragma updateBank exit=UserBank_01
  801 }
  802 
  803 #define disableRFPGM_address    0x3916
  804 #pragma origin disableRFPGM_address
  805 void disableRFPGM()
  806 {
  807   #asm
  808     DW 0x2000
  809   #endasm
  810   #pragma updateBank exit=UserBank_01
  811 }
  812 
  813 #define setupRFPGM_address  0x3919
  814 #pragma origin setupRFPGM_address
  815 void setupRFPGM(uns8 x @ W)
  816 {
  817   #asm
  818     DW 0x2000
  819   #endasm
  820   #pragma updateBank exit=UserBank_01
  821 }
  822 
  823 #define runRFPGM_address    0x391c
  824 #pragma origin runRFPGM_address
  825 void runRFPGM()
  826 {
  827   #asm
  828     DW 0x2000
  829   #endasm
  830   #pragma updateBank exit=UserBank_01
  831 }
  832 
  833 #define iqrfDeepSleep_address   0x391f
  834 #pragma origin iqrfDeepSleep_address
  835 void iqrfDeepSleep()
  836 {
  837   #asm
  838     DW 0x2000
  839   #endasm
  840   #pragma updateBank exit=UserBank_01
  841 }
  842 
  843 #define wasRFICrestarted_address    0x3922
  844 #pragma origin wasRFICrestarted_address
  845 bit wasRFICrestarted()
  846 {
  847   #asm
  848     DW 0x2000
  849   #endasm
  850   #pragma updateBank exit=UserBank_01
  851   return Carry;
  852 }
  853 
  854 #define eeeWriteData_address    0x3925
  855 #pragma origin eeeWriteData_address
  856 bit eeeWriteData(uns16 address @ param3)
  857 {
  858   #asm
  859     DW 0x2000
  860   #endasm
  861   #pragma updateBank exit=UserBank_01
  862   return Carry;
  863 }
  864 
  865 #define eeeReadData_address 0x3928
  866 #pragma origin eeeReadData_address
  867 bit eeeReadData(uns16 address @ param3)
  868 {
  869   #asm
  870     DW 0x2000
  871   #endasm
  872   #pragma updateBank exit=UserBank_01
  873   return Carry;
  874 }
  875 
  876 #define setINDF0_address    0x3931
  877 #pragma origin setINDF0_address
  878 void setINDF0(uns8 value @ W)
  879 {
  880   #asm
  881     DW 0x2000
  882   #endasm
  883   #pragma updateBank exit=UserBank_01
  884 }
  885 
  886 #define setINDF1_address    0x3934
  887 #pragma origin setINDF1_address
  888 void setINDF1(uns8 value @ W)
  889 {
  890   #asm
  891     DW 0x2000
  892   #endasm
  893   #pragma updateBank exit=UserBank_01
  894 }
  895 
  896 #define getRSSI_address 0x3937
  897 #pragma origin getRSSI_address
  898 uns8 getRSSI()
  899 {
  900   #asm
  901     DW 0x2000
  902   #endasm
  903   #pragma updateBank exit=UserBank_01
  904   return W;
  905 }
  906 
  907 #define removeBondAddress_address   0x393a
  908 #pragma origin removeBondAddress_address
  909 void removeBondAddress()
  910 {
  911   #asm
  912     DW 0x2000
  913   #endasm
  914   #pragma updateBank exit=UserBank_01
  915 }
  916 
  917 #define sendFRC_address 0x393d
  918 #pragma origin sendFRC_address
  919 uns8 sendFRC(uns8 command @ W)
  920 {
  921   #asm
  922     DW 0x2000
  923   #endasm
  924   #pragma updateBank exit=UserBank_01
  925   return W;
  926 }
  927 
  928 #define responseFRC_address 0x3940
  929 #pragma origin responseFRC_address
  930 void responseFRC()
  931 {
  932   #asm
  933     DW 0x2000
  934   #endasm
  935   #pragma updateBank exit=UserBank_01
  936 }
  937 
  938 #define bondRequestAdvanced_address 0x3943
  939 #pragma origin bondRequestAdvanced_address
  940 bit bondRequestAdvanced()
  941 {
  942   #asm
  943     DW 0x2000
  944   #endasm
  945   #pragma updateBank exit=UserBank_01
  946   return Carry;
  947 }
  948 
  949 #define prebondNodeAtNode_address   0x3946
  950 #pragma origin prebondNodeAtNode_address
  951 bit prebondNodeAtNode()
  952 {
  953   #asm
  954     DW 0x2000
  955   #endasm
  956   #pragma updateBank exit=UserBank_01
  957   return Carry;
  958 }
  959 
  960 #define nodeAuthorization_address   0x3949
  961 #pragma origin nodeAuthorization_address
  962 bit nodeAuthorization(uns8 address @ W)
  963 {
  964   #asm
  965     DW 0x2000
  966   #endasm
  967   #pragma updateBank exit=UserBank_01
  968   return Carry;
  969 }
  970 
  971 #define dummy01_address 0x394c
  972 #pragma origin dummy01_address
  973 void dummy01()
  974 {
  975   #asm
  976   DW 0x2000
  977   #endasm
  978   #pragma updateBank exit=UserBank_01
  979 }
  980 
  981 #define setAccessPassword_address   0x3958
  982 #pragma origin setAccessPassword_address
  983 void setAccessPassword()
  984 {
  985   #asm
  986     DW 0x2000
  987   #endasm
  988   #pragma updateBank exit=UserBank_01
  989 }
  990 
  991 #define setUserKey_address  0x395b
  992 #pragma origin setUserKey_address
  993 void setUserKey()
  994 {
  995   #asm
  996     DW 0x2000
  997   #endasm
  998   #pragma updateBank exit=UserBank_01
  999 }
 1000 
 1001 #define amIRecipientOfFRC_address   0x3961
 1002 #pragma origin amIRecipientOfFRC_address
 1003 bit amIRecipientOfFRC()
 1004 {
 1005   #asm
 1006     DW 0x2000
 1007   #endasm
 1008   #pragma updateBank exit=UserBank_01
 1009   return Carry;
 1010 }
 1011 
 1012 #define setLEDR_address 0x3964
 1013 #pragma origin setLEDR_address
 1014 void setLEDR()
 1015 {
 1016   #asm
 1017     DW 0x2000
 1018   #endasm
 1019   #pragma updateBank exit=UserBank_01
 1020 }
 1021 
 1022 #define encryptBufferRF_address 0x3967
 1023 #pragma origin encryptBufferRF_address
 1024 void encryptBufferRF(uns8 blocks @ W)
 1025 {
 1026   #asm
 1027     DW 0x2000
 1028   #endasm
 1029   #pragma updateBank exit=UserBank_01
 1030 }
 1031 
 1032 #define decryptBufferRF_address 0x396a
 1033 #pragma origin decryptBufferRF_address
 1034 void decryptBufferRF(uns8 blocks @ W)
 1035 {
 1036   #asm
 1037     DW 0x2000
 1038   #endasm
 1039   #pragma updateBank exit=UserBank_01
 1040 }
 1041 
 1042 #define prebondNodeAtCoordinator_address    0x396d
 1043 #pragma origin prebondNodeAtCoordinator_address
 1044 bit prebondNodeAtCoordinator(uns8 address @ W)
 1045 {
 1046   #asm
 1047     DW 0x2000
 1048   #endasm
 1049   #pragma updateBank exit=UserBank_01
 1050   return Carry;
 1051 }
 1052 
 1053 #define setFSRs_address 0x3970
 1054 #pragma origin setFSRs_address
 1055 uns8 setFSRs(uns8 fsrs @ W)
 1056 {
 1057   #asm
 1058     DW 0x2000
 1059   #endasm
 1060   #pragma updateBank exit=UserBank_01
 1061   return W;
 1062 }
 1063 
 1064 // For internal usage only
 1065 #define updateCRC16_address 0x3973
 1066 #pragma origin updateCRC16_address
 1067 void updateCRC16(uns8 value @ W)
 1068 {
 1069   #asm
 1070     DW 0x2000
 1071   #endasm
 1072   #pragma updateBank exit=UserBank_01
 1073 }
 1074 
 1075 #define smartConnect_address    0x3976
 1076 #pragma origin smartConnect_address
 1077 bit smartConnect(uns8 address @ W)
 1078 {
 1079   #asm
 1080     DW 0x2000
 1081   #endasm
 1082   #pragma updateBank exit=UserBank_01
 1083   return Carry;
 1084 }
 1085 
 1086 #define addressBitmap_address   0x3979
 1087 #pragma origin addressBitmap_address
 1088 uns8 addressBitmap(uns8 bitIndex @ W)
 1089 {
 1090   #asm
 1091     DW 0x2000
 1092   #endasm
 1093   #pragma updateBank exit=UserBank_01
 1094   return W;
 1095 }
 1096 
 1097 #define setServiceChannel_address   0x397c
 1098 #pragma origin setServiceChannel_address
 1099 bit setServiceChannel(uns8 channelNumber @ W)
 1100 {
 1101   #asm
 1102     DW 0x2000
 1103   #endasm
 1104   #pragma updateBank exit=UserBank_01
 1105   return Carry;
 1106 }
 1107 
 1108 #pragma optimize 1
 1109 #pragma update_RP 1
 1110 #pragma update_PAGE 1
 1111 #pragma origin __APPLICATION_ADDRESS