1 // ********************************************************************* 2 // General public DPA header file * 3 // ********************************************************************* 4 // Copyright (c) MICRORISC s.r.o. 5 // 6 // File: $RCSfile: DPA.h,v $ 7 // Version: $Revision: 1.301 $ 8 // Date: $Date: 2021/08/20 12:56:25 $ 9 // 10 // Revision history: 11 // 2021/08/20 Release for DPA 4.16 12 // 2020/09/03 Release for DPA 4.15 13 // 2020/04/03 Release for DPA 4.14 14 // 2020/02/27 Release for DPA 4.13 15 // 2020/01/09 Release for DPA 4.12 16 // 2019/12/11 Release for DPA 4.11 17 // 2019/10/09 Release for DPA 4.10 18 // 2019/06/12 Release for DPA 4.03 19 // 2019/06/03 Release for DPA 4.02 20 // 2019/03/07 Release for DPA 4.01 21 // 2019/01/10 Release for DPA 4.00 22 // 2018/10/25 Release for DPA 3.03 23 // 2017/11/16 Release for DPA 3.02 24 // 2017/08/14 Release for DPA 3.01 25 // 2017/03/13 Release for DPA 3.00 26 // 2016/09/12 Release for DPA 2.28 27 // 2016/04/14 Release for DPA 2.27 28 // 2016/03/03 Release for DPA 2.26 29 // 2016/01/21 Release for DPA 2.25 30 // 2015/12/01 Release for DPA 2.24 31 // 2015/10/23 Release for DPA 2.23 32 // 2015/09/25 Release for DPA 2.22 33 // 2015/09/03 Release for DPA 2.21 34 // 2015/08/05 Release for DPA 2.20 35 // 2014/10/31 Release for DPA 2.10 36 // 2014/04/30 Release for DPA 2.00 37 // 2013/10/03 Release for DPA 1.00 38 // 39 // ********************************************************************* 40 41 // Online DPA documentation https://doc.iqrf.org/DpaTechGuide/ 42 // IQRF Standards documentation https://doc.iqrf.org/ 43 44 #ifndef _DPA_HEADER_ 45 #define _DPA_HEADER_ 46 47 //############################################################################################ 48 49 // DPA version 50 #define DPA_VERSION_MASTER 0x0416 51 52 #if defined( __CC5X__ ) && !defined( CC5XnotDPA ) 53 // Compiled only at CC5X 54 #if __CC5X__ < 3703 55 #error Insufficient CC5X compiler version, V3.7C is minimum 56 #endif 57 58 #if IQRFOS < 404 59 #error IQRF OS 4.04+ is required 60 #endif 61 62 // Bank for custom variables 63 #pragma rambank = UserBank_01 64 65 // Main DPA API entry address (also start of the licensed FLASH) 66 #define DPA_API_ADDRESS __LICENSED_FLASH 67 68 // Main DPA entry address 69 #define MAIN_DPA_ADDRESS ( DPA_API_ADDRESS + 4 ) 70 71 // Main DPA API entry address stub 72 #define DPA_API_ADDRESS_ENTRY 0x3A08 73 74 // Address of the DPA Custom Handler 75 #define CUSTOM_HANDLER_ADDRESS 0x3A20 76 77 // Address of the DPA Custom Handler end + 1 78 #if defined TR7xD 79 #define CUSTOM_HANDLER_ADDRESS_END 0x3D80 80 #else 81 #define CUSTOM_HANDLER_ADDRESS_END __USER_INTERRUPT 82 #endif 83 84 // DPA API entry function 85 uns8 DpaApiEntry( uns8 par1, uns8 par2, uns8 apiIndex ); 86 87 // DPA API codes 88 #define DPA_API_RFTX_DPAPACKET 0 89 #define DPA_API_READ_CONFIG_BYTE 1 90 #define DPA_API_SEND_TO_IFACEMASTER 2 91 #define DPA_API_COORDINATOR_RFTX_DPAPACKET 3 92 #define DPA_API_LOCAL_REQUEST 4 93 #define DPA_API_SET_PERIPHERAL_ERROR 5 94 #define DPA_API_SET_RF_DEFAULTS 6 95 #define DPA_API_LOCAL_FRC 7 96 #define DPA_API_CRC8 8 97 #define DPA_API_AGGREGATE_FRC 9 98 #define DPA_API_SET_OTK 10 99 #define DPA_API_I2C_INIT 11 100 #define DPA_API_I2C_START 12 101 #define DPA_API_I2C_WRITE 13 102 #define DPA_API_I2C_READ 14 103 #define DPA_API_I2C_STOP 15 104 #define DPA_API_I2C_WAIT_FOR_ACK 16 105 #define DPA_API_I2C_SHUTDOWN 17 106 #define DPA_API_I2C_WAIT_FOR_IDLE 18 107 #define DPA_API_SLEEP 19 108 #define DPA_API_AFTER_SLEEP 20 109 110 // Used buffer size symbols 111 #define sizeofBufferRF sizeof( bufferRF ) 112 #define sizeofBufferAUX sizeof( bufferAUX ) 113 #define sizeofBufferCOM sizeof( bufferCOM ) 114 #define sizeofBufferINFO sizeof( bufferINFO ) 115 116 // Converts conventional address to the linear one at PIC16F1938 117 // Note: This is workaround of CC5X preprocessor bug "No '#endif' detected" 118 #define error_ #error Address cannot be linearized 119 #define LINEARIZE_ADDRESS( a ) \ 120 #if ( ((uns16)(a)) - ( ((uns16)(a)) / 0x80 ) * 0x80 ) >= 0x20 && ( ((uns16)(a)) - ( ((uns16)(a)) / 0x80 ) * 0x80 ) <= 0x6F && ( ((uns16)(a)) / 0x80 ) <= 12 \ 121 ( ( ( ((uns16)(a)) / 0x80 ) * 0x50 ) + ( ((uns16)(a)) - 0x20 - ( ((uns16)(a)) / 0x80 ) * 0x80 ) + 0x2000 ) \ 122 #else \ 123 errorX \ 124 #endif 125 #undef error_ 126 127 #define STRUCTATTR 128 129 #else //__CC5X__ 130 // Not compiled at CC5X 131 132 #if !defined( CC5XnotDPA ) 133 // Define CC5X types 134 typedef uint8_t uns8; 135 typedef uint16_t uns16; 136 // Disables alignment of members of structures 137 #define STRUCTATTR __attribute__((packed)) 138 #else 139 #define STRUCTATTR 140 #endif 141 142 // Define some types missing at Arduino 143 #ifdef Arduino_h 144 typedef int8_t int8; 145 typedef int16_t int16; 146 #endif 147 148 // Fake buffer sizes 149 #define sizeofBufferRF 64 150 #define sizeofBufferAUX 64 151 #define sizeofBufferCOM 64 152 #define sizeofBufferINFO 64 153 154 #endif // __CC5X__ 155 156 // Indexes of configuration bytes used by DpaApiReadConfigByte( index ) 157 // Checksum 158 #define CFGIND_CHECKSUM 0x00 159 // Embedded peripherals 160 #define CFGIND_DPA_PERIPHERALS 0x01 161 // DPA configuration flags #0 162 #define CFGIND_DPA_FLAGS0 0x05 163 // Main RF channel, used by the subordinate network 164 #define CFGIND_CHANNEL_2ND_A 0x06 165 // Second RF channel, used by the subordinate network 166 #define CFGIND_CHANNEL_2ND_B 0x07 167 // TX power 168 #define CFGIND_TXPOWER 0x08 169 // RX filter used by checkRF() 170 #define CFGIND_RXFILTER 0x09 171 // toutRF for LP mode 172 #define CFGIND_DPA_LP_TOUTRF 0x0A 173 // UART interface baud rate 174 #define CFGIND_DPA_UART_IFACE_SPEED 0x0B 175 // Alternate DSM channel 176 #define CFGIND_ALTERNATE_DSM_CHANNEL 0x0C 177 // DPA configuration flags #1 178 #define CFGIND_DPA_FLAGS1 0x0D 179 // Main RF channel 180 #define CFGIND_CHANNEL_A 0x11 181 // Second RF channel 182 #define CFGIND_CHANNEL_B 0x12 183 184 // 0: checks only mandatory precondition in order to prevent critical side-effects 185 // 1: as above plus checks meaningful parameter conditions 186 // 2: full implemented parameter checking (default) 187 #ifndef PARAM_CHECK_LEVEL 188 #define PARAM_CHECK_LEVEL 2 189 #endif 190 191 // "foursome" at IFace structure 192 typedef struct 193 { 194 // Node address low byte 195 uns8 NADRlow; 196 // Node address high byte 197 uns8 NADRhigh; 198 // Peripheral number 199 uns8 PNUM; 200 // Peripheral command 201 uns8 PCMD; 202 // HWPID 203 uns16 HWPID; 204 } STRUCTATTR TDpaIFaceHeader; 205 206 // Maximum command PCMD value (except reserved 0x3F = CMD_GET_PER_INFO) 207 #define PCMD_MAX 0x7f 208 // Bit mask at PCMD that indicates DPA Response message 209 #define RESPONSE_FLAG 0x80 210 211 // IQMESH coordinator address 212 #define COORDINATOR_ADDRESS 0x00 213 // IQMESH broadcast address 214 #define BROADCAST_ADDRESS 0xff 215 // IQMESH temporary address, assigned by pre-bonding before authorization is done 216 #define TEMPORARY_ADDRESS 0xfe 217 // Address of the local device addressed by IFace 218 #define LOCAL_ADDRESS 0xfc 219 // Maximum IQMESH network device address 220 #define MAX_ADDRESS ( 240 - 1 ) 221 222 // Time slots lengths in 10 ms 223 #define MIN_STD_TIMESLOT 4 224 #define MAX_STD_TIMESLOT 6 225 226 #define MIN_LP_TIMESLOT 8 227 #define MAX_LP_TIMESLOT 10 228 229 // Maximum number of DPA PData bytes ( minus 8 = 6B foursome + 8b error code + 8b DpaValue ) 230 #define DPA_MAX_DATA_LENGTH ( sizeofBufferCOM - sizeof( TDpaIFaceHeader ) - 2 * sizeof( uns8 ) ) 231 232 // Maximum number of peripherals info that can fit in the message 233 #define MAX_PERIPHERALS_PER_BLOCK_INFO ( DPA_MAX_DATA_LENGTH / sizeof( TPeripheralInfoAnswer ) ) 234 235 // Embedded peripheral numbers 236 #define PNUM_COORDINATOR 0x00 237 #define PNUM_NODE 0x01 238 #define PNUM_OS 0x02 239 #define PNUM_EEPROM 0x03 240 #define PNUM_EEEPROM 0x04 241 #define PNUM_RAM 0x05 242 #define PNUM_LEDR 0x06 243 #define PNUM_LEDG 0x07 244 #define PNUM_IO 0x09 245 #define PNUM_THERMOMETER 0x0A 246 #define PNUM_UART 0x0C 247 #define PNUM_FRC 0x0D 248 249 // Number of the 1st user peripheral 250 #define PNUM_USER 0x20 251 // Number of the last user peripheral 252 #define PNUM_USER_MAX 0x3E 253 // Maximum peripheral number 254 #define PNUM_MAX 0x7F 255 256 // Fake peripheral number used to flag DPA response with error sent by RF 257 #define PNUM_ERROR_FLAG 0xFE 258 // Special peripheral used for enumeration 259 #define PNUM_ENUMERATION 0xFF 260 261 // DPA Commands for embedded peripherals 262 #define CMD_COORDINATOR_ADDR_INFO 0 263 #define CMD_COORDINATOR_DISCOVERED_DEVICES 1 264 #define CMD_COORDINATOR_BONDED_DEVICES 2 265 #define CMD_COORDINATOR_CLEAR_ALL_BONDS 3 266 #define CMD_COORDINATOR_BOND_NODE 4 267 #define CMD_COORDINATOR_REMOVE_BOND 5 268 #define CMD_COORDINATOR_DISCOVERY 7 269 #define CMD_COORDINATOR_SET_DPAPARAMS 8 270 #define CMD_COORDINATOR_SET_HOPS 9 271 #define CMD_COORDINATOR_BACKUP 11 272 #define CMD_COORDINATOR_RESTORE 12 273 #define CMD_COORDINATOR_AUTHORIZE_BOND 13 274 #define CMD_COORDINATOR_BRIDGE 14 275 #define CMD_COORDINATOR_SMART_CONNECT 18 276 #define CMD_COORDINATOR_SET_MID 19 277 278 #define CMD_NODE_READ 0 279 #define CMD_NODE_REMOVE_BOND 1 280 #define CMD_NODE_BACKUP 6 281 #define CMD_NODE_RESTORE 7 282 #define CMD_NODE_VALIDATE_BONDS 8 283 284 #define CMD_OS_READ 0 285 #define CMD_OS_RESET 1 286 #define CMD_OS_READ_CFG 2 287 #define CMD_OS_RFPGM 3 288 #define CMD_OS_SLEEP 4 289 #define CMD_OS_BATCH 5 290 #define CMD_OS_SET_SECURITY 6 291 #define CMD_OS_INDICATE 7 292 #define CMD_OS_RESTART 8 293 #define CMD_OS_WRITE_CFG_BYTE 9 294 #define CMD_OS_LOAD_CODE 10 295 #define CMD_OS_SELECTIVE_BATCH 11 296 #define CMD_OS_TEST_RF_SIGNAL 12 297 #define CMD_OS_FACTORY_SETTINGS 13 298 #define CMD_OS_WRITE_CFG 15 299 300 #define CMD_RAM_READ 0 301 #define CMD_RAM_WRITE 1 302 #define CMD_RAM_READ_ANY 15 303 304 #define CMD_EEPROM_READ CMD_RAM_READ 305 #define CMD_EEPROM_WRITE CMD_RAM_WRITE 306 307 #define CMD_EEEPROM_XREAD ( CMD_RAM_READ + 2 ) 308 #define CMD_EEEPROM_XWRITE ( CMD_RAM_WRITE + 2 ) 309 310 #define CMD_LED_SET_OFF 0 311 #define CMD_LED_SET_ON 1 312 #define CMD_LED_PULSE 3 313 #define CMD_LED_FLASHING 4 314 315 #define CMD_IO_DIRECTION 0 316 #define CMD_IO_SET 1 317 #define CMD_IO_GET 2 318 319 #define CMD_THERMOMETER_READ 0 320 321 #define CMD_UART_OPEN 0 322 #define CMD_UART_CLOSE 1 323 #define CMD_UART_WRITE_READ 2 324 #define CMD_UART_CLEAR_WRITE_READ 3 325 326 #define CMD_FRC_SEND 0 327 #define CMD_FRC_EXTRARESULT 1 328 #define CMD_FRC_SEND_SELECTIVE 2 329 #define CMD_FRC_SET_PARAMS 3 330 331 #define CMD_GET_PER_INFO 0x3f 332 333 // DPA peripheral type 334 typedef enum 335 { 336 PERIPHERAL_TYPE_DUMMY = 0x00, 337 PERIPHERAL_TYPE_COORDINATOR = 0x01, 338 PERIPHERAL_TYPE_NODE = 0x02, 339 PERIPHERAL_TYPE_OS = 0x03, 340 PERIPHERAL_TYPE_EEPROM = 0x04, 341 PERIPHERAL_TYPE_BLOCK_EEPROM = 0x05, 342 PERIPHERAL_TYPE_RAM = 0x06, 343 PERIPHERAL_TYPE_LED = 0x07, 344 PERIPHERAL_TYPE_SPI = 0x08, 345 PERIPHERAL_TYPE_IO = 0x09, 346 PERIPHERAL_TYPE_UART = 0x0a, 347 PERIPHERAL_TYPE_THERMOMETER = 0x0b, 348 PERIPHERAL_TYPE_ADC = 0x0c, 349 PERIPHERAL_TYPE_PWM = 0x0d, 350 PERIPHERAL_TYPE_FRC = 0x0e, 351 // Starts peripheral type number interval for user peripherals 352 PERIPHERAL_TYPE_USER_AREA = 0x80 353 } TDpaPeripheralType; 354 355 // Peripheral extended information 356 typedef enum 357 { 358 PERIPHERAL_TYPE_EXTENDED_DEFAULT = 0x00, 359 PERIPHERAL_TYPE_EXTENDED_READ = 0x01, 360 PERIPHERAL_TYPE_EXTENDED_WRITE = 0x02, 361 PERIPHERAL_TYPE_EXTENDED_READ_WRITE = PERIPHERAL_TYPE_EXTENDED_READ | PERIPHERAL_TYPE_EXTENDED_WRITE 362 } TDpaPeripheralTypeExtended; 363 364 // Response packet error codes 365 typedef enum 366 { 367 // No error 368 STATUS_NO_ERROR = 0, 369 370 // General fail 371 ERROR_FAIL = 1, 372 // Incorrect PCMD 373 ERROR_PCMD = 2, 374 // Incorrect PNUM or PCMD 375 ERROR_PNUM = 3, 376 // Incorrect Address value when addressing memory type peripherals 377 ERROR_ADDR = 4, 378 // Incorrect Data length 379 ERROR_DATA_LEN = 5, 380 // Incorrect Data 381 ERROR_DATA = 6, 382 // Incorrect HWPID used 383 ERROR_HWPID = 7, 384 // Incorrect NADR 385 ERROR_NADR = 8, 386 // IFACE data consumed by Custom DPA Handler 387 ERROR_IFACE_CUSTOM_HANDLER = 9, 388 // Custom DPA Handler is missing 389 ERROR_MISSING_CUSTOM_DPA_HANDLER = 10, 390 391 // Beginning of the user code error interval 392 ERROR_USER_FROM = 0x20, 393 // End of the user code error interval 394 ERROR_USER_TO = 0x3f, 395 396 // Bit/flag reserved for a future use 397 STATUS_RESERVED_FLAG = 0x40, 398 // Bit to flag asynchronous DPA Response from [N] 399 STATUS_ASYNC_RESPONSE = 0x80, 400 // Error code used to mark DPA Confirmation 401 STATUS_CONFIRMATION = 0xff 402 } TErrorCodes; 403 404 // Embedded FRC commands 405 typedef enum 406 { 407 // 2 bits 408 FRC_Ping = 0x00, 409 FRC_AcknowledgedBroadcastBits = 0x02, 410 FRC_PrebondedAlive = 0x03, 411 FRC_SupplyVoltage = 0x04, 412 FRC_PrebondedMemoryCompare2B = 0x05, 413 // 1 byte 414 FRC_Temperature = 0x80, 415 FRC_AcknowledgedBroadcastBytes = 0x81, 416 FRC_MemoryRead = 0x82, 417 FRC_MemoryReadPlus1 = 0x83, 418 FRC_FrcResponseTime = 0x84, 419 FRC_TestRFsignal = 0x85, 420 // 4 bytes 421 FRC_PrebondedMemoryRead4BPlus1 = 0xF8, 422 FRC_MemoryRead4B = 0xFA 423 } TFRCommands; 424 425 // Intervals of user FRC codes 426 #define FRC_USER_BIT_FROM 0x40 427 #define FRC_USER_BIT_TO 0x7F 428 #define FRC_USER_BYTE_FROM 0xC0 429 #define FRC_USER_BYTE_TO 0xDF 430 #define FRC_USER_2BYTE_FROM 0xF0 431 #define FRC_USER_2BYTE_TO 0xF7 432 #define FRC_USER_4BYTE_FROM 0xFC 433 #define FRC_USER_4BYTE_TO 0xFF 434 435 // No HWPID specified 436 #define HWPID_Default 0x0000 437 // Use this type to override HWPID check 438 #define HWPID_DoNotCheck 0xFfFf 439 440 // RAM peripheral block definitions 441 #ifdef TR7xD 442 #define PERIPHERAL_RAM_LENGTH 48 443 #else 444 #define PERIPHERAL_RAM_LENGTH 80 445 #endif 446 447 // Start address of EEPROM peripheral in the real EEPROM 448 #ifndef COORDINATOR_CUSTOM_HANDLER // Node 449 #define PERIPHERAL_EEPROM_START ( (uns8)0x00 ) 450 #else // Coordinator 451 #define PERIPHERAL_EEPROM_START ( (uns8)0x80 ) 452 #endif 453 454 // Length of the internal EEPROM peripheral array 455 #define PERIPHERAL_EEPROM_LENGTH ( (uns8)( 0xC0 - PERIPHERAL_EEPROM_START ) ) 456 457 // Length of the readable area of serial EEEPROM from the EEEPROM DPA peripheral write point of view. 458 #define EEEPROM_READ_LENGTH 0x8000 459 // Length of the writable area of serial EEEPROM from the EEEPROM DPA peripheral write point of view. 460 #define EEEPROM_WRITE_LENGTH 0x4000 461 462 // Starting address of the IO Setup DPA storage at external EEPROM 463 #define IOSETUP_EEEPROM_ADDR ( 0x0000 + sizeofBufferAUX ) 464 // Length of the IO setup memory block 465 #define IOSETUP_LENGTH sizeofBufferAUX 466 467 // --------------------------------------------------------- 468 469 // Enumerate peripherals structure 470 typedef struct 471 { 472 uns16 DpaVersion; 473 uns8 UserPerNr; 474 uns8 EmbeddedPers[PNUM_USER / 8]; 475 uns16 HWPID; 476 uns16 HWPIDver; 477 uns8 Flags; 478 uns8 UserPer[( PNUM_MAX - PNUM_USER + 1 + 7 ) / 8]; 479 } STRUCTATTR TEnumPeripheralsAnswer; 480 481 #define FlagUserPer(UserPersArray,UserPerNumber) UserPersArray[((UserPerNumber)-PNUM_USER) / 8] |= (uns8)0x01 << (((UserPerNumber)-PNUM_USER) % 8); 482 483 // Get peripheral info structure (CMD_GET_PER_INFO) 484 typedef struct 485 { 486 uns8 PerTE; 487 uns8 PerT; 488 uns8 Par1; 489 uns8 Par2; 490 } STRUCTATTR TPeripheralInfoAnswer; 491 492 // Error DPA response (PNUM_ERROR_FLAG) 493 typedef struct 494 { 495 uns8 ErrN; 496 uns8 PNUMoriginal; 497 } STRUCTATTR TErrorAnswer; 498 499 // Structure returned by CMD_COORDINATOR_ADDR_INFO 500 typedef struct 501 { 502 uns8 DevNr; 503 uns8 DID; 504 } STRUCTATTR TPerCoordinatorAddrInfo_Response; 505 506 // Structure for CMD_COORDINATOR_BOND_NODE 507 typedef struct 508 { 509 uns8 ReqAddr; 510 uns8 BondingTestRetries; 511 } STRUCTATTR TPerCoordinatorBondNode_Request; 512 513 // Structure returned by CMD_COORDINATOR_BOND_NODE or CMD_COORDINATOR_SMART_CONNECT 514 typedef struct 515 { 516 uns8 BondAddr; 517 uns8 DevNr; 518 } STRUCTATTR TPerCoordinatorBondNodeSmartConnect_Response; 519 520 // Structure for CMD_COORDINATOR_REMOVE_BOND 521 typedef struct 522 { 523 uns8 BondAddr; 524 } STRUCTATTR TPerCoordinatorRemoveBond_Request; 525 526 // Structure returned by CMD_COORDINATOR_REMOVE_BOND 527 typedef struct 528 { 529 uns8 DevNr; 530 } STRUCTATTR TPerCoordinatorRemoveBond_Response; 531 532 // Structure for CMD_COORDINATOR_DISCOVERY 533 typedef struct 534 { 535 uns8 TxPower; 536 uns8 MaxAddr; 537 } STRUCTATTR TPerCoordinatorDiscovery_Request; 538 539 // Structure returned by CMD_COORDINATOR_DISCOVERY 540 typedef struct 541 { 542 uns8 DiscNr; 543 } STRUCTATTR TPerCoordinatorDiscovery_Response; 544 545 // Structure for and also returned by CMD_COORDINATOR_SET_DPAPARAMS 546 typedef struct 547 { 548 uns8 DpaParam; 549 } STRUCTATTR TPerCoordinatorSetDpaParams_Request_Response; 550 551 // Structure for and also returned by CMD_COORDINATOR_SET_HOPS 552 typedef struct 553 { 554 uns8 RequestHops; 555 uns8 ResponseHops; 556 } STRUCTATTR TPerCoordinatorSetHops_Request_Response; 557 558 // Structure for CMD_COORDINATOR_BACKUP and CMD_NODE_BACKUP 559 typedef struct 560 { 561 uns8 Index; 562 } STRUCTATTR TPerCoordinatorNodeBackup_Request; 563 564 // Structure returned by CMD_COORDINATOR_BACKUP and CMD_NODE_BACKUP 565 typedef struct 566 { 567 uns8 NetworkData[49]; 568 } STRUCTATTR TPerCoordinatorNodeBackup_Response; 569 570 // Structure for CMD_COORDINATOR_RESTORE and CMD_NODE_RESTORE 571 typedef struct 572 { 573 uns8 NetworkData[49]; 574 } STRUCTATTR TPerCoordinatorNodeRestore_Request; 575 576 // Structure for CMD_COORDINATOR_AUTHORIZE_BOND 577 typedef struct 578 { 579 uns8 ReqAddr; 580 uns8 MID[4]; 581 } STRUCTATTR TPerCoordinatorAuthorizeBond_Request; 582 583 // Structure returned by CMD_COORDINATOR_AUTHORIZE_BOND 584 typedef struct 585 { 586 uns8 BondAddr; 587 uns8 DevNr; 588 } STRUCTATTR TPerCoordinatorAuthorizeBond_Response; 589 590 // Structure for CMD_COORDINATOR_BRIDGE 591 typedef struct 592 { 593 TDpaIFaceHeader subHeader; 594 uns8 subPData[DPA_MAX_DATA_LENGTH - sizeof( TDpaIFaceHeader )]; 595 } STRUCTATTR TPerCoordinatorBridge_Request; 596 597 // Structure returned by CMD_COORDINATOR_BRIDGE 598 typedef struct 599 { 600 TDpaIFaceHeader subHeader; 601 uns8 subRespCode; 602 uns8 subDpaValue; 603 uns8 subPData[DPA_MAX_DATA_LENGTH - sizeof( TDpaIFaceHeader ) - 2 * sizeof( uns8 )]; 604 } STRUCTATTR TPerCoordinatorBridge_Response; 605 606 // Structure for CMD_COORDINATOR_SMART_CONNECT 607 typedef struct 608 { 609 uns8 ReqAddr; 610 uns8 BondingTestRetries; 611 uns8 IBK[16]; 612 uns8 MID[4]; 613 uns8 reserved0; 614 uns8 VirtualDeviceAddress; 615 uns8 UserData[4]; 616 uns8 reserved1[10]; 617 } STRUCTATTR TPerCoordinatorSmartConnect_Request; 618 619 // Structure for CMD_COORDINATOR_SET_MID 620 typedef struct 621 { 622 uns8 MID[4]; 623 uns8 BondAddr; 624 } STRUCTATTR TPerCoordinatorSetMID_Request; 625 626 // Structure returned by CMD_NODE_READ 627 typedef struct 628 { 629 uns8 ntwADDR; 630 uns8 ntwVRN; 631 uns8 ntwZIN; 632 uns8 ntwDID; 633 uns8 ntwPVRN; 634 uns16 ntwUSERADDRESS; 635 uns16 ntwID; 636 uns8 ntwVRNFNZ; 637 uns8 ntwCFG; 638 uns8 Flags; 639 } STRUCTATTR TPerNodeRead_Response; 640 641 // Structures for CMD_NODE_VALIDATE_BONDS 642 typedef struct 643 { 644 uns8 Address; 645 uns8 MID[4]; 646 } STRUCTATTR TPerNodeValidateBondsItem; 647 648 // Structure for CMD_NODE_VALIDATE_BONDS 649 typedef struct 650 { 651 TPerNodeValidateBondsItem Bonds[DPA_MAX_DATA_LENGTH / sizeof( TPerNodeValidateBondsItem )]; 652 } STRUCTATTR TPerNodeValidateBonds_Request; 653 654 // Structure returned by CMD_OS_READ 655 typedef struct 656 { 657 uns8 MID[4]; 658 uns8 OsVersion; 659 uns8 McuType; 660 uns16 OsBuild; 661 uns8 Rssi; 662 uns8 SupplyVoltage; 663 uns8 Flags; 664 uns8 SlotLimits; 665 uns8 IBK[16]; 666 // Enumerate peripherals part, variable length because of UserPer field 667 uns16 DpaVersion; 668 uns8 UserPerNr; 669 uns8 EmbeddedPers[PNUM_USER / 8]; 670 uns16 HWPID; 671 uns16 HWPIDver; 672 uns8 FlagsEnum; 673 uns8 UserPer[( PNUM_MAX - PNUM_USER + 1 + 7 ) / 8]; 674 } STRUCTATTR TPerOSRead_Response; 675 676 // Structure returned by CMD_OS_READ_CFG 677 typedef struct 678 { 679 uns8 Checksum; 680 uns8 Configuration[31]; 681 uns8 RFPGM; 682 uns8 Undocumented[1]; 683 } STRUCTATTR TPerOSReadCfg_Response; 684 685 // Structure for CMD_OS_WRITE_CFG 686 typedef struct 687 { 688 uns8 Undefined; 689 uns8 Configuration[31]; 690 uns8 RFPGM; 691 } STRUCTATTR TPerOSWriteCfg_Request; 692 693 // Structures for CMD_OS_WRITE_CFG_BYTE 694 typedef struct 695 { 696 uns8 Address; 697 uns8 Value; 698 uns8 Mask; 699 } STRUCTATTR TPerOSWriteCfgByteTriplet; 700 701 // Structure for CMD_OS_WRITE_CFG_BYTE 702 typedef struct 703 { 704 TPerOSWriteCfgByteTriplet Triplets[DPA_MAX_DATA_LENGTH / sizeof( TPerOSWriteCfgByteTriplet )]; 705 } STRUCTATTR TPerOSWriteCfgByte_Request; 706 707 // Structure for CMD_OS_SET_SECURITY 708 typedef struct 709 { 710 uns8 Type; 711 uns8 Data[16]; 712 } STRUCTATTR TPerOSSetSecurity_Request; 713 714 // Structure for CMD_OS_LOAD_CODE 715 typedef struct 716 { 717 uns8 Flags; 718 uns16 Address; 719 uns16 Length; 720 uns16 CheckSum; 721 } STRUCTATTR TPerOSLoadCode_Request; 722 723 // Structure for CMD_OS_SLEEP 724 typedef struct 725 { 726 uns16 Time; 727 uns8 Control; 728 } STRUCTATTR TPerOSSleep_Request; 729 730 // Structure for CMD_OS_SELECTIVE_BATCH 731 typedef struct 732 { 733 uns8 SelectedNodes[30]; 734 uns8 Requests[DPA_MAX_DATA_LENGTH - 30]; 735 } STRUCTATTR TPerOSSelectiveBatch_Request; 736 737 // Structure for CMD_OS_TEST_RF_SIGNAL request 738 typedef struct 739 { 740 uns8 Channel; 741 uns8 RXfilter; 742 uns16 Time; 743 } STRUCTATTR TPerOSTestRfSignal_Request; 744 745 // Structure for CMD_OS_TEST_RF_SIGNAL response 746 typedef struct 747 { 748 uns8 Counter; 749 } STRUCTATTR TPerOSTestRfSignal_Response; 750 751 // Structure for CMD_OS_INDICATE request 752 typedef struct 753 { 754 uns8 Control; 755 } STRUCTATTR TPerOSIndicate_Request; 756 757 // Structure for general memory request 758 typedef struct 759 { 760 // Address of data to write or read 761 uns8 Address; 762 763 union 764 { 765 // Memory read request 766 struct 767 { 768 // Length of data to read 769 uns8 Length; 770 } Read; 771 772 // Size of Address field 773 #define MEMORY_WRITE_REQUEST_OVERHEAD ( sizeof( uns8 ) ) 774 775 // Memory write request 776 struct 777 { 778 uns8 PData[DPA_MAX_DATA_LENGTH - MEMORY_WRITE_REQUEST_OVERHEAD]; 779 } Write; 780 781 } ReadWrite; 782 } STRUCTATTR TPerMemoryRequest; 783 784 // Structure for general extended memory request 785 typedef struct 786 { 787 // Address of data to write or read 788 uns16 Address; 789 790 union 791 { 792 // Memory read request 793 struct 794 { 795 // Length of data to read 796 uns8 Length; 797 } Read; 798 799 // Size of Address field 800 #define XMEMORY_WRITE_REQUEST_OVERHEAD ( sizeof( uns16 ) ) 801 802 // Memory write request 803 struct 804 { 805 uns8 PData[DPA_MAX_DATA_LENGTH - XMEMORY_WRITE_REQUEST_OVERHEAD]; 806 } Write; 807 808 } ReadWrite; 809 } STRUCTATTR TPerXMemoryRequest; 810 811 // Structure for CMD_IO requests 812 typedef struct 813 { 814 uns8 Port; 815 uns8 Mask; 816 uns8 Value; 817 } STRUCTATTR TPerIOTriplet; 818 819 typedef struct 820 { 821 uns8 Header; // == PNUM_IO_DELAY 822 uns16 Delay; 823 } STRUCTATTR TPerIODelay; 824 825 // Union for CMD_IO_SET and CMD_IO_DIRECTION requests 826 typedef union 827 { 828 TPerIOTriplet Triplets[DPA_MAX_DATA_LENGTH / sizeof( TPerIOTriplet )]; 829 TPerIODelay Delays[DPA_MAX_DATA_LENGTH / sizeof( TPerIODelay )]; 830 } STRUCTATTR TPerIoDirectionAndSet_Request; 831 832 // Structure returned by CMD_THERMOMETER_READ 833 typedef struct 834 { 835 int8 IntegerValue; 836 int16 SixteenthValue; 837 } STRUCTATTR TPerThermometerRead_Response; 838 839 // Structure for CMD_UART_OPEN 840 typedef struct 841 { 842 uns8 BaudRate; 843 } STRUCTATTR TPerUartOpen_Request; 844 845 // Structure for CMD_UART_[CLEAR_]WRITE_READ 846 typedef struct 847 { 848 uns8 ReadTimeout; 849 uns8 WrittenData[DPA_MAX_DATA_LENGTH - sizeof( uns8 )]; 850 } STRUCTATTR TPerUartWriteRead_Request; 851 852 // Structure for CMD_FRC_SEND 853 typedef struct 854 { 855 uns8 FrcCommand; 856 uns8 UserData[30]; 857 } STRUCTATTR TPerFrcSend_Request; 858 859 // Structure for CMD_FRC_SEND_SELECTIVE 860 typedef struct 861 { 862 uns8 FrcCommand; 863 uns8 SelectedNodes[30]; 864 uns8 UserData[25]; 865 } STRUCTATTR TPerFrcSendSelective_Request; 866 867 // Structure returned by CMD_FRC_SEND and CMD_FRC_SEND_SELECTIVE 868 typedef struct 869 { 870 uns8 Status; 871 uns8 FrcData[DPA_MAX_DATA_LENGTH - sizeof( uns8 )]; 872 } STRUCTATTR TPerFrcSend_Response; 873 874 // Structure for request and response of CMD_FRC_SET_PARAMS 875 typedef struct 876 { 877 uns8 FrcParams; 878 } STRUCTATTR TPerFrcSetParams_RequestResponse; 879 880 // Interface and CMD_COORDINATOR_BRIDGE confirmation structure 881 typedef struct 882 { 883 // Number of hops 884 uns8 Hops; 885 // Time slot length in 10ms 886 uns8 TimeSlotLength; 887 // Number of hops for response 888 uns8 HopsResponse; 889 } STRUCTATTR TIFaceConfirmation; 890 891 // --------------------------------------------------------- 892 893 // DPA Message data structure (packet w/o NADR, PNUM, PCMD, HWPID) 894 typedef union 895 { 896 // General DPA request 897 struct 898 { 899 uns8 PData[DPA_MAX_DATA_LENGTH]; 900 } Request; 901 902 // General DPA response 903 struct 904 { 905 uns8 PData[DPA_MAX_DATA_LENGTH]; 906 } Response; 907 908 // Enumerate peripherals structure 909 TEnumPeripheralsAnswer EnumPeripheralsAnswer; 910 911 // Get peripheral info structure (CMD_GET_PER_INFO) 912 TPeripheralInfoAnswer PeripheralInfoAnswer; 913 914 // Get peripheral info structure (CMD_GET_PER_INFO) for more peripherals 915 TPeripheralInfoAnswer PeripheralInfoAnswers[MAX_PERIPHERALS_PER_BLOCK_INFO]; 916 917 // Error DPA response (PNUM_ERROR_FLAG) 918 TErrorAnswer ErrorAnswer; 919 920 // Structure returned by CMD_COORDINATOR_ADDR_INFO 921 TPerCoordinatorAddrInfo_Response PerCoordinatorAddrInfo_Response; 922 923 // Structure for CMD_COORDINATOR_BOND_NODE 924 TPerCoordinatorBondNode_Request PerCoordinatorBondNode_Request; 925 926 // Structure returned by CMD_COORDINATOR_BOND_NODE or CMD_COORDINATOR_SMART_CONNECT 927 TPerCoordinatorBondNodeSmartConnect_Response PerCoordinatorBondNodeSmartConnect_Response; 928 929 // Structure for CMD_COORDINATOR_REMOVE_BOND 930 TPerCoordinatorRemoveBond_Request PerCoordinatorRemoveBond_Request; 931 932 // Structure returned by CMD_COORDINATOR_REMOVE_BOND 933 TPerCoordinatorRemoveBond_Response PerCoordinatorRemoveBond_Response; 934 935 // Structure for CMD_COORDINATOR_DISCOVERY 936 TPerCoordinatorDiscovery_Request PerCoordinatorDiscovery_Request; 937 938 // Structure returned by CMD_COORDINATOR_DISCOVERY 939 TPerCoordinatorDiscovery_Response PerCoordinatorDiscovery_Response; 940 941 // Structure for and also returned by CMD_COORDINATOR_SET_DPAPARAMS 942 TPerCoordinatorSetDpaParams_Request_Response PerCoordinatorSetDpaParams_Request_Response; 943 944 // Structure for and also returned by CMD_COORDINATOR_SET_HOPS 945 TPerCoordinatorSetHops_Request_Response PerCoordinatorSetHops_Request_Response; 946 947 // Structure for CMD_COORDINATOR_BACKUP and CMD_NODE_BACKUP 948 TPerCoordinatorNodeBackup_Request PerCoordinatorNodeBackup_Request; 949 950 // Structure returned by CMD_COORDINATOR_BACKUP and CMD_NODE_BACKUP 951 TPerCoordinatorNodeBackup_Response PerCoordinatorNodeBackup_Response; 952 953 // Structure for CMD_COORDINATOR_RESTORE and CMD_NODE_RESTORE 954 TPerCoordinatorNodeRestore_Request PerCoordinatorNodeRestore_Request; 955 956 // Structure for CMD_COORDINATOR_AUTHORIZE_BOND 957 TPerCoordinatorAuthorizeBond_Request PerCoordinatorAuthorizeBond_Request; 958 959 // Structure returned by CMD_COORDINATOR_AUTHORIZE_BOND 960 TPerCoordinatorAuthorizeBond_Response PerCoordinatorAuthorizeBond_Response; 961 962 // Structure for CMD_COORDINATOR_BRIDGE 963 TPerCoordinatorBridge_Request PerCoordinatorBridge_Request; 964 965 // Structure returned by CMD_COORDINATOR_BRIDGE 966 TPerCoordinatorBridge_Response PerCoordinatorBridge_Response; 967 968 // Structure for CMD_COORDINATOR_SMART_CONNECT 969 TPerCoordinatorSmartConnect_Request PerCoordinatorSmartConnect_Request; 970 971 // Structure for CMD_COORDINATOR_SET_MID 972 TPerCoordinatorSetMID_Request PerCoordinatorSetMID_Request; 973 974 // Structure returned by CMD_NODE_READ 975 TPerNodeRead_Response PerNodeRead_Response; 976 977 // Structure for CMD_NODE_VALIDATE_BONDS 978 TPerNodeValidateBonds_Request PerNodeValidateBonds_Request; 979 980 // Structure returned by CMD_OS_READ 981 TPerOSRead_Response PerOSRead_Response; 982 983 // Structure returned by CMD_OS_READ_CFG 984 TPerOSReadCfg_Response PerOSReadCfg_Response; 985 986 // Structure for CMD_OS_WRITE_CFG 987 TPerOSWriteCfg_Request PerOSWriteCfg_Request; 988 989 // Structure for CMD_OS_WRITE_CFG_BYTE 990 TPerOSWriteCfgByte_Request PerOSWriteCfgByte_Request; 991 992 // Structure for CMD_OS_SET_SECURITY 993 TPerOSSetSecurity_Request PerOSSetSecurity_Request; 994 995 // Structure for CMD_OS_LOAD_CODE 996 TPerOSLoadCode_Request PerOSLoadCode_Request; 997 998 // Structure for CMD_OS_SLEEP 999 TPerOSSleep_Request PerOSSleep_Request; 1000 1001 // Structure for CMD_OS_SELECTIVE_BATCH 1002 TPerOSSelectiveBatch_Request PerOSSelectiveBatch_Request; 1003 1004 // Structure for CMD_OS_TEST_RF_SIGNAL request 1005 TPerOSTestRfSignal_Request PerOSTestRfSignal_Request; 1006 1007 // Structure for CMD_OS_INDICATE request 1008 TPerOSIndicate_Request PerOSIndicate_Request; 1009 1010 // Structure for CMD_OS_TEST_RF_SIGNAL response 1011 TPerOSTestRfSignal_Response PerOSTestRfSignal_Response; 1012 1013 // Structure for general memory request 1014 TPerMemoryRequest MemoryRequest; 1015 1016 // Structure for general extended memory request 1017 TPerXMemoryRequest XMemoryRequest; 1018 1019 // Structure for CMD_IO requests 1020 TPerIoDirectionAndSet_Request PerIoDirectionAndSet_Request; 1021 1022 // Structure returned by CMD_THERMOMETER_READ 1023 TPerThermometerRead_Response PerThermometerRead_Response; 1024 1025 // Structure for CMD_UART_OPEN 1026 TPerUartOpen_Request PerUartOpen_Request; 1027 1028 // Structure for CMD_UART_[CLEAR_]WRITE_READ 1029 TPerUartWriteRead_Request PerUartWriteRead_Request; 1030 1031 // Structure for CMD_FRC_SEND 1032 TPerFrcSend_Request PerFrcSend_Request; 1033 1034 // Structure returned by CMD_FRC_SEND and CMD_FRC_SEND_SELECTIVE 1035 TPerFrcSend_Response PerFrcSend_Response; 1036 1037 // Structure for CMD_FRC_SEND_SELECTIVE 1038 TPerFrcSendSelective_Request PerFrcSendSelective_Request; 1039 1040 // Structure for request and response of CMD_FRC_SET_PARAMS 1041 TPerFrcSetParams_RequestResponse PerFrcSetParams_RequestResponse; 1042 1043 // Interface and CMD_COORDINATOR_BRIDGE confirmation structure 1044 TIFaceConfirmation IFaceConfirmation; 1045 } TDpaMessage; 1046 1047 // Custom DPA Handler events 1048 #define DpaEvent_DpaRequest 0 1049 #define DpaEvent_Interrupt 1 1050 #define DpaEvent_Idle 2 1051 #define DpaEvent_Init 3 1052 #define DpaEvent_Notification 4 1053 #define DpaEvent_AfterRouting 5 1054 #define DpaEvent_BeforeSleep 6 1055 #define DpaEvent_AfterSleep 7 1056 #define DpaEvent_Reset 8 1057 #define DpaEvent_DisableInterrupts 9 1058 #define DpaEvent_FrcValue 10 1059 #define DpaEvent_ReceiveDpaResponse 11 1060 #define DpaEvent_IFaceReceive 12 1061 #define DpaEvent_ReceiveDpaRequest 13 1062 #define DpaEvent_BeforeSendingDpaResponse 14 1063 #define DpaEvent_PeerToPeer 15 1064 #define DpaEvent_UserDpaValue 17 1065 #define DpaEvent_FrcResponseTime 18 1066 #define DpaEvent_BondingButton 19 1067 #define DpaEvent_Indicate 20 1068 #define DpaEvent_VerifyLocalFrc 21 1069 1070 #define DpaEvent_LAST DpaEvent_VerifyLocalFrc 1071 1072 // Types of the diagnostic DPA Value that is returned inside DPA response 1073 typedef enum 1074 { 1075 DpaValueType_RSSI = 0, 1076 DpaValueType_SupplyVoltage = 1, 1077 DpaValueType_System = 2, 1078 DpaValueType_User = 3 1079 } TDpaValueType; 1080 1081 // Type (color) of LED peripheral 1082 typedef enum 1083 { 1084 LED_COLOR_RED = 0, 1085 LED_COLOR_GREEN = 1, 1086 LED_COLOR_BLUE = 2, 1087 LED_COLOR_YELLOW = 3, 1088 LED_COLOR_WHITE = 4, 1089 LED_COLOR_UNKNOWN = 0xff 1090 } TLedColor; 1091 1092 // Baud rates 1093 typedef enum 1094 { 1095 DpaBaud_1200 = 0x00, 1096 DpaBaud_2400 = 0x01, 1097 DpaBaud_4800 = 0x02, 1098 DpaBaud_9600 = 0x03, 1099 DpaBaud_19200 = 0x04, 1100 DpaBaud_38400 = 0x05, 1101 DpaBaud_57600 = 0x06, 1102 DpaBaud_115200 = 0x07, 1103 DpaBaud_230400 = 0x08 1104 } TBaudRates; 1105 1106 // Useful PNUM_IO definitions 1107 typedef enum 1108 { 1109 PNUM_IO_PORTA = 0x00, 1110 PNUM_IO_TRISA = 0x00, 1111 1112 PNUM_IO_PORTB = 0x01, 1113 PNUM_IO_TRISB = 0x01, 1114 1115 PNUM_IO_PORTC = 0x02, 1116 PNUM_IO_TRISC = 0x02, 1117 1118 PNUM_IO_PORTE = 0x04, 1119 PNUM_IO_TRISE = 0x04, 1120 1121 PNUM_IO_WPUB = 0x11, 1122 #if defined( TR7xG ) 1123 PNUM_IO_WPUA = 0x10, 1124 PNUM_IO_WPUC = 0x12, 1125 PNUM_IO_WPUE = 0x14, 1126 #endif 1127 PNUM_IO_DELAY = 0xff, 1128 } PNUM_IO_Definitions; 1129 1130 // To test for enumeration peripherals request 1131 #define IsDpaEnumPeripheralsRequestNoSize() ( _PNUM == PNUM_ENUMERATION && _PCMD == CMD_GET_PER_INFO ) 1132 1133 #if PARAM_CHECK_LEVEL >= 2 1134 #define IsDpaEnumPeripheralsRequest() ( IsDpaEnumPeripheralsRequestNoSize() && _DpaDataLength == 0 ) 1135 #else 1136 #define IsDpaEnumPeripheralsRequest() IsDpaEnumPeripheralsRequestNoSize() 1137 #endif 1138 1139 // To test for peripherals information request 1140 #define IsDpaPeripheralInfoRequestNoSize() ( _PNUM != PNUM_ENUMERATION && _PCMD == CMD_GET_PER_INFO ) 1141 1142 #if PARAM_CHECK_LEVEL >= 2 1143 #define IsDpaPeripheralInfoRequest() ( IsDpaPeripheralInfoRequestNoSize() && _DpaDataLength == 0 ) 1144 #else 1145 #define IsDpaPeripheralInfoRequest() IsDpaPeripheralInfoRequestNoSize() 1146 #endif 1147 1148 // Optimized macro for both testing enumeration peripherals ELSE peripherals information. See examples 1149 #define IfDpaEnumPeripherals_Else_PeripheralInfo_Else_PeripheralRequestNoSize() if ( _PCMD == CMD_GET_PER_INFO ) if ( _PNUM == PNUM_ENUMERATION ) 1150 1151 #if PARAM_CHECK_LEVEL >= 2 1152 #define IfDpaEnumPeripherals_Else_PeripheralInfo_Else_PeripheralRequest() if ( _DpaDataLength == 0 && _PCMD == CMD_GET_PER_INFO ) if ( _PNUM == PNUM_ENUMERATION ) 1153 #else 1154 #define IfDpaEnumPeripherals_Else_PeripheralInfo_Else_PeripheralRequest() IfDpaEnumPeripherals_Else_PeripheralInfo_Else_PeripheralRequestNoSize() 1155 #endif 1156 1157 #if defined( __CC5X__ ) && !defined( CC5XnotDPA ) 1158 1159 // DPA message at bufferRF 1160 TDpaMessage DpaRfMessage @bufferRF; 1161 1162 // Note: Works only, because _DpaMessage.Request.PData is at the same location as bufferRF! 1163 #define _FSR_DPA _FSR_RF 1164 1165 // Actual allocation of the RAM Peripheral memory block @ UserBank_02 1166 bank12 uns8 PeripheralRam[PERIPHERAL_RAM_LENGTH] @ 0x620; 1167 1168 // Actual DPA message parameters at memory 1169 #define _NADR RX 1170 #define _NADRhigh RTAUX 1171 #define _PNUM PNUM 1172 #define _PCMD PCMD 1173 #define _DpaDataLength DLEN 1174 #define _DpaMessage DpaRfMessage 1175 1176 // Return actual DPA user routine event 1177 #define GetDpaEvent() userReg0 1178 1179 // Stores DPA Params inside DPA request/response 1180 #define _DpaParams PPAR 1181 // Get DPA Value type out of the DPA Params 1182 #define DpaValueType() ( _DpaParams & 0b11 ) 1183 1184 // When TRUE then encryptBufferRF/decryptBufferRF is done by AccessPassord 1185 bit encryptByAccessPassword @ usedBank0[0x23].7; 1186 1187 // DP2P response time-slot time in 10 ms 1188 #define DP2P_TIMESLOT 11 1189 1190 // DP2P request packet. Fills out the whole bufferRF. 1191 typedef struct 1192 { 1193 uns8 Header[3]; // 0x000000 1194 uns8 SelectedNodes[30]; 1195 uns8 SlotLength; 1196 uns8 ResponseTxPower; 1197 uns8 Reserved; 1198 uns16 HWPID; 1199 uns8 PDATA[sizeofBufferRF - ( 3 + 30 + 1 + 1 + 1 ) * sizeof( uns8 ) - ( 1 ) * sizeof( uns16 )]; // size is 26 bytes 1200 } STRUCTATTR TDP2Prequest; 1201 1202 // DP2P invite packet. 1203 typedef struct 1204 { 1205 uns8 Header[3]; // 0x000001 1206 uns8 NADR; 1207 uns8 Rand[12]; 1208 } STRUCTATTR TDP2Invite; 1209 1210 // DP2P confirm packet. 1211 typedef struct 1212 { 1213 uns8 Header[3]; // 0x000003 1214 uns8 NADR; 1215 uns8 Rand[12]; 1216 } STRUCTATTR TDP2Confirm; 1217 1218 // DP2P response packet. 1219 typedef struct 1220 { 1221 uns8 Header[3]; // 0xFfFfFf 1222 uns8 NADR; 1223 uns8 PDATA[DPA_MAX_DATA_LENGTH]; 1224 } STRUCTATTR TDP2Presponse; 1225 1226 // Include assembler definitions 1227 #include "HexCodes.h" 1228 1229 // Next code must start at the IQRF APPLICATION routine entry point 1230 #pragma origin __APPLICATION_ADDRESS 1231 1232 #endif // __CC5X__ 1233 #endif // _DPA_HEADER_ 1234 //############################################################################################