1 // ********************************************************************* 2 // IQRF OS macros * 3 // ********************************************************************* 4 // Just for easier life (better mnemonic and compatibility with older 5 // versions only). 6 // 7 // Online IQRF OS Reference Guide: http://www.iqrf.org/IQRF-OS-Reference-guide/ 8 // 9 // Copyright (c) IQRF Tech s.r.o. 10 // 11 // Intended for: 12 // OS: v4.03D 13 // 14 // File: IQRF-macros.h 15 // Version: v1.00 Revision: 28/02/2018 16 // 17 // Revision history: 18 // v1.00: 28/02/2018 First release for OS 4.03D. 19 // 20 // ********************************************************************* 21 22 #define TRUE 1 23 #define FALSE 0 24 25 #define F_OSC 16000000 // 16 MHz MCU clock 26 27 #define buttonPressed (!PORTB.4) // Button on DK-EVAL-04x 28 #define TX_POWER_MAX 7 29 #define EEE_BLOCK_SIZE 64 // External EEPROM data block size 30 31 #define setTXpower(level) setRFpower(level) 32 #define prebondNode() prebondNodeAtNode() 33 34 // --- setRFmode(mode) --- 35 #define _RX_STD 0x00 // RX mode STD 36 #define _RX_LP 0x01 // RX mode LP 37 #define _RX_XLP 0x02 // RX mode XLP 38 #define _RLPMAT 0x04 // LP/XLP RX asynchronous termination 39 #define _TX_STD 0x00 // TX mode STD 40 #define _TX_LP 0x10 // TX mode LP 41 #define _TX_XLP 0x20 // TX mode XLP 42 #define _WPE 0x40 // Wait Packet End 43 #define _STDL 0x80 // Prolongs preamble for STD TX mode 44 45 // --- Reset --- 46 #define reset() softReset() 47 48 // --- Sleep with wake-up on pin change --- 49 // Remarks: FSR1 register is destroyed 50 #define sleepWOC() /* Wake-up on both rising and falling edge*/ \ 51 do { \ 52 GIE = 0; /* Global interrupt disabled*/ \ 53 IOCBP.4 = 1; /* Positive edge enabled (clear if not required)*/ \ 54 FSR1 = &IOCBN; \ 55 setINDF1(IOCBN | 0x10); /* Negative edge enabled. This bit (IOCBN.4) can not*/ \ 56 /* be accessed directly due to OS restriction*/ \ 57 IOCIE = 1; /* Interrupt on change enabled*/ \ 58 GIE = 1; /* Global interrupt enabled*/ \ 59 setWDToff(); /* Watchdog disabled*/ \ 60 iqrfSleep(); /* Sleep*/ \ 61 GIE = 0; \ 62 FSR1 = &IOCBN; \ 63 setINDF1(IOCBN & ~0x10); /* Negative edge disabled (IOCBN.4)*/ \ 64 IOCBP.4 = 0; /* Positive edge disabled*/ \ 65 GIE = 1; \ 66 } while (0) 67 68 // --- Watchdog Timer --- 69 #define setWDTon() SWDTEN = 1 // WDT on 70 #define setWDToff() SWDTEN = 0 // WDT off 71 72 #define setWDTon_1ms() WDTCON = 0b000001 // WDT on, timeout 1 ms 73 #define setWDTon_2ms() WDTCON = 0b000011 // WDT on, timeout 2 ms 74 #define setWDTon_4ms() WDTCON = 0b000101 // WDT on, timeout 4 ms 75 #define setWDTon_8ms() WDTCON = 0b000111 // WDT on, timeout 8 ms 76 #define setWDTon_16ms() WDTCON = 0b001001 // WDT on, timeout 16 ms 77 #define setWDTon_32ms() WDTCON = 0b001011 // WDT on, timeout 32 ms 78 #define setWDTon_64ms() WDTCON = 0b001101 // WDT on, timeout 64 ms 79 #define setWDTon_128ms() WDTCON = 0b001111 // WDT on, timeout 128 ms 80 #define setWDTon_256ms() WDTCON = 0b010001 // WDT on, timeout 256 ms 81 #define setWDTon_512ms() WDTCON = 0b010011 // WDT on, timeout 512 ms 82 #define setWDTon_1s() WDTCON = 0b010101 // WDT on, timeout 1 s 83 #define setWDTon_2s() WDTCON = 0b010111 // WDT on, timeout 2 s 84 #define setWDTon_4s() WDTCON = 0b011001 // WDT on, timeout 4 s 85 #define setWDTon_8s() WDTCON = 0b011011 // WDT on, timeout 8 s 86 #define setWDTon_16s() WDTCON = 0b011101 // WDT on, timeout 16 s 87 #define setWDTon_32s() WDTCON = 0b011111 // WDT on, timeout 32 s 88 #define setWDTon_64s() WDTCON = 0b100001 // WDT on, timeout 64 s 89 #define setWDTon_128s() WDTCON = 0b100011 // WDT on, timeout 128 s 90 #define setWDTon_256s() WDTCON = 0b100101 // WDT on, timeout 256 s 91 92 // --- Debug with breakpoint number --- 93 // uns8 wValue: breakpoint number displayed in IQRF IDE 94 #define debugW(wValue) \ 95 do { \ 96 W = wValue; \ 97 debug(); \ 98 } while (0) 99 100 #define breakpoint(wValue) debugW(wValue) 101 102 // --- Brown-Out Reset --- 103 #define setBORon() writeToRAM(&BORCON, 0x80) // BOR on 104 #define setBORoff() writeToRAM(&BORCON, 0x00) // BOR off 105 106 // --- setupRFPGM(parameter) --- 107 #define _DUAL_CHANNEL 0x03 // RFPGM dual channel receiving 108 #define _LP_MODE 0x04 // RFPGM low power mode receiving 109 #define _ENABLE_ON_RESET 0x10 // RFPGM invoking by reset 110 #define _TIME_TERMINATE 0x40 // RFPGM auto termination after ~1 min 111 #define _PIN_TERMINATE 0x80 // RFPGM termination by MCU pins 112 113 // --- external EEPROM & temperature sensor power control --- 114 #define eEEPROM_TempSensorOn() _PWRT = 1 115 #define eEEPROM_TempSensorOff() _PWRT = 0 116 117 // --- Interrupt on change flags control --- 118 #define clearIOCF() IOCBF.4 = 0 // Clear interrupt on change flag. 119 #define clearIOCBN() writeToRAM(&IOCBN, IOCBN & ~0x10) // Clear negative edge flag. This bit (IOCBN.4) can not be accessed directly due to OS restriction. 120 #define setIOCBN() writeToRAM(&IOCBN, IOCBN | 0x10) // Negative edge active. 121 122 // --- FRC Response time --- 123 #define _FRC_RESPONSE_TIME_40_MS 0b00000000 // 40 ms 124 #define _FRC_RESPONSE_TIME_360_MS 0b00010000 // 360 ms 125 #define _FRC_RESPONSE_TIME_680_MS 0b00100000 // 680 ms 126 #define _FRC_RESPONSE_TIME_1320_MS 0b00110000 // 1320 ms 127 #define _FRC_RESPONSE_TIME_2600_MS 0b01000000 // 2600 ms 128 #define _FRC_RESPONSE_TIME_5160_MS 0b01010000 // 5160 ms 129 #define _FRC_RESPONSE_TIME_10280_MS 0b01100000 // 10280 ms 130 #define _FRC_RESPONSE_TIME_20520_MS 0b01110000 // 20520 ms 131 132 // Only value of one of the predefined constants above can be used as a parameter "ms" 133 #define setFRCresponseTime(ms) \ 134 do { \ 135 configFRC &= ~_FRC_RESPONSE_TIME_20520_MS; \ 136 configFRC |= (ms); \ 137 } while (0) 138 139 #define getFRCresponseTime() (configFRC & _FRC_RESPONSE_TIME_20520_MS) 140 141 // --- Copy Application data from EEPROM to bufferINFO --- 142 #define appInfo() eeReadData((__EEAPPINFO - __EESTART), 32) 143 144 // --- Write one byte to specified location in RAM --- 145 #define writeToRAM(address, value) \ 146 do { \ 147 FSR0=address; \ 148 setINDF0(value); \ 149 } while(0) 150 151 // --- Macros relating to setFSRs() function --- 152 #define setFSR01(fsr0, fsr1) setFSRs( (fsr0) + ( ((uns8)(fsr1)) << 4 ) ) 153 #define setFSR0(fsr0) setFSR01( fsr0, _FSR_NONE ) 154 #define setFSR1(fsr1) setFSR01( _FSR_NONE, fsr1 ) 155 156 #define _FSR_NONE 0x00 // Set FSR to no buffer 157 #define _FSR_NINFO 0x01 // Set FSR to networkInfo 158 #define _FSR_INFO 0x02 // Set FSR to bufferINFO 159 #define _FSR_COM 0x03 // Set FSR to bufferCOM 160 #define _FSR_AUX 0x04 // Set FSR to bufferAUX 161 #define _FSR_RF 0x05 // Set FSR to bufferRF 162 #define _FSR_ntwADDR 0x07 // Set FSR to ntwADDR (bank 11) 163 164 // --- Service channels --- 165 #define SERVICE_CHANNELS_COUNT 3 166 167 // --- LED control --- 168 #define toggleLEDR() _LEDR ^= 1 169 #define toggleLEDG() _LEDG ^= 1 170 171 // *********************************************************************