1 // ********************************************************************* 2 // IQRF OS functions * 3 // ********************************************************************* 4 // Intended for: 5 // OS: v4.03D 6 // 7 // Online IQRF OS Reference Guide: http://www.iqrf.org/IQRF-OS-Reference-guide/ 8 // 9 // Copyright (c) IQRF Tech s.r.o. 10 // 11 // File: IQRF-functions.h 12 // Version: v1.00 Revision: 27/06/2018 13 // 14 // Revision history: 15 // v1.00: 27/06/2018 First release for OS 4.03D. 16 // 17 // ********************************************************************* 18 19 #pragma optimize 0 20 #pragma update_PAGE 0 21 #pragma update_RP 0 22 23 #define dummy_address 0x3810 24 #pragma origin dummy_address 25 void dummy() 26 { 27 #asm 28 DW 0x2000 29 #endasm 30 #pragma updateBank exit=UserBank_01 31 } 32 33 #define iqrfSleep_address 0x3816 34 #pragma origin iqrfSleep_address 35 void iqrfSleep() 36 { 37 #asm 38 DW 0x2000 39 #endasm 40 #pragma updateBank exit=UserBank_01 41 } 42 43 #define _debug_address 0x3819 44 #pragma origin _debug_address 45 void _debug() 46 { 47 #asm 48 DW 0x2000 49 #endasm 50 #pragma updateBank exit=UserBank_01 51 } 52 53 #define debug() \ 54 do { \ 55 _debug(); \ 56 nop(); \ 57 } while (0) 58 59 #define moduleInfo_address 0x381c 60 #pragma origin moduleInfo_address 61 void moduleInfo() 62 { 63 #asm 64 DW 0x2000 65 #endasm 66 #pragma updateBank exit=UserBank_01 67 } 68 69 #define pulsingLEDR_address 0x3822 70 #pragma origin pulsingLEDR_address 71 void pulsingLEDR() 72 { 73 #asm 74 DW 0x2000 75 #endasm 76 #pragma updateBank exit=UserBank_01 77 } 78 79 #define pulseLEDR_address 0x3825 80 #pragma origin pulseLEDR_address 81 void pulseLEDR() 82 { 83 #asm 84 DW 0x2000 85 #endasm 86 #pragma updateBank exit=UserBank_01 87 } 88 89 #define stopLEDR_address 0x3828 90 #pragma origin stopLEDR_address 91 void stopLEDR() 92 { 93 #asm 94 DW 0x2000 95 #endasm 96 #pragma updateBank exit=UserBank_01 97 } 98 99 #define pulsingLEDG_address 0x382b 100 #pragma origin pulsingLEDG_address 101 void pulsingLEDG() 102 { 103 #asm 104 DW 0x2000 105 #endasm 106 #pragma updateBank exit=UserBank_01 107 } 108 109 #define pulseLEDG_address 0x382e 110 #pragma origin pulseLEDG_address 111 void pulseLEDG() 112 { 113 #asm 114 DW 0x2000 115 #endasm 116 #pragma updateBank exit=UserBank_01 117 } 118 119 #define stopLEDG_address 0x3831 120 #pragma origin stopLEDG_address 121 void stopLEDG() 122 { 123 #asm 124 DW 0x2000 125 #endasm 126 #pragma updateBank exit=UserBank_01 127 } 128 129 #define setOnPulsingLED_address 0x3834 130 #pragma origin setOnPulsingLED_address 131 void setOnPulsingLED(uns8 ticks @ W) 132 { 133 #asm 134 DW 0x2000 135 #endasm 136 #pragma updateBank exit=UserBank_01 137 } 138 139 #define setOffPulsingLED_address 0x3837 140 #pragma origin setOffPulsingLED_address 141 void setOffPulsingLED(uns8 ticks @ W) 142 { 143 #asm 144 DW 0x2000 145 #endasm 146 #pragma updateBank exit=UserBank_01 147 } 148 149 #define eeReadByte_address 0x383a 150 #pragma origin eeReadByte_address 151 uns8 eeReadByte(uns8 address @ W) 152 { 153 #asm 154 DW 0x2000 155 #endasm 156 #pragma updateBank exit=UserBank_01 157 return 1; 158 } 159 160 #define eeReadData_address 0x383d 161 #pragma origin eeReadData_address 162 bit eeReadData(uns8 address @ param2, uns8 length @ W) 163 { 164 #asm 165 DW 0x2000 166 #endasm 167 #pragma updateBank exit=UserBank_01 168 return Carry; 169 } 170 171 #define eeWriteByte_address 0x3840 172 #pragma origin eeWriteByte_address 173 void eeWriteByte(uns8 address @ param2, uns8 data @ W) 174 { 175 #asm 176 DW 0x2000 177 #endasm 178 #pragma updateBank exit=UserBank_01 179 } 180 181 #define eeWriteData_address 0x3843 182 #pragma origin eeWriteData_address 183 void eeWriteData(uns8 address @ param2, uns8 length @ W) 184 { 185 #asm 186 DW 0x2000 187 #endasm 188 #pragma updateBank exit=UserBank_01 189 } 190 191 #define readFromRAM_address 0x3846 192 #pragma origin readFromRAM_address 193 uns8 readFromRAM(uns16 address @ FSR0) 194 { 195 #asm 196 DW 0x2000 197 #endasm 198 #pragma updateBank exit=UserBank_01 199 return 1; 200 } 201 202 #define clearBufferINFO_address 0x384c 203 #pragma origin clearBufferINFO_address 204 void clearBufferINFO() 205 { 206 #asm 207 DW 0x2000 208 #endasm 209 #pragma updateBank exit=UserBank_01 210 } 211 212 #define swapBufferINFO_address 0x384f 213 #pragma origin swapBufferINFO_address 214 void swapBufferINFO() 215 { 216 #asm 217 DW 0x2000 218 #endasm 219 #pragma updateBank exit=UserBank_01 220 } 221 222 #define compareBufferINFO2RF_address 0x3852 223 #pragma origin compareBufferINFO2RF_address 224 bit compareBufferINFO2RF(uns8 length @ W) 225 { 226 #asm 227 DW 0x2000 228 #endasm 229 #pragma updateBank exit=UserBank_01 230 return Carry; 231 } 232 233 #define copyBufferINFO2COM_address 0x3855 234 #pragma origin copyBufferINFO2COM_address 235 void copyBufferINFO2COM() 236 { 237 #asm 238 DW 0x2000 239 #endasm 240 #pragma updateBank exit=UserBank_01 241 } 242 243 #define copyBufferINFO2RF_address 0x3858 244 #pragma origin copyBufferINFO2RF_address 245 void copyBufferINFO2RF() 246 { 247 #asm 248 DW 0x2000 249 #endasm 250 #pragma updateBank exit=UserBank_01 251 } 252 253 #define copyBufferRF2COM_address 0x385b 254 #pragma origin copyBufferRF2COM_address 255 void copyBufferRF2COM() 256 { 257 #asm 258 DW 0x2000 259 #endasm 260 #pragma updateBank exit=UserBank_01 261 } 262 263 #define copyBufferRF2INFO_address 0x385e 264 #pragma origin copyBufferRF2INFO_address 265 void copyBufferRF2INFO() 266 { 267 #asm 268 DW 0x2000 269 #endasm 270 #pragma updateBank exit=UserBank_01 271 } 272 273 #define copyBufferCOM2RF_address 0x3861 274 #pragma origin copyBufferCOM2RF_address 275 void copyBufferCOM2RF() 276 { 277 #asm 278 DW 0x2000 279 #endasm 280 #pragma updateBank exit=UserBank_01 281 } 282 283 #define copyBufferCOM2INFO_address 0x3864 284 #pragma origin copyBufferCOM2INFO_address 285 void copyBufferCOM2INFO() 286 { 287 #asm 288 DW 0x2000 289 #endasm 290 #pragma updateBank exit=UserBank_01 291 } 292 293 #define copyMemoryBlock_address 0x3867 294 #pragma origin copyMemoryBlock_address 295 void copyMemoryBlock(uns16 from @ FSR0, uns16 to @ FSR1, uns8 length @ W) 296 { 297 #asm 298 DW 0x2000 299 #endasm 300 #pragma updateBank exit=UserBank_01 301 } 302 303 #define startDelay_address 0x386a 304 #pragma origin startDelay_address 305 void startDelay(uns8 ticks @ W) 306 { 307 #asm 308 DW 0x2000 309 #endasm 310 #pragma updateBank exit=UserBank_01 311 } 312 313 #define startLongDelay_address 0x386d 314 #pragma origin startLongDelay_address 315 void startLongDelay(uns16 ticks @ param3) 316 { 317 #asm 318 DW 0x2000 319 #endasm 320 #pragma updateBank exit=UserBank_01 321 } 322 323 #define isDelay_address 0x3870 324 #pragma origin isDelay_address 325 bit isDelay() 326 { 327 #asm 328 DW 0x2000 329 #endasm 330 #pragma updateBank exit=UserBank_01 331 return Carry; 332 } 333 334 #define waitDelay_address 0x3873 335 #pragma origin waitDelay_address 336 void waitDelay(uns8 ticks @ W) 337 { 338 #asm 339 DW 0x2000 340 #endasm 341 #pragma updateBank exit=UserBank_01 342 } 343 344 #define waitMS_address 0x3876 345 #pragma origin waitMS_address 346 void waitMS(uns8 ms @ W) 347 { 348 #asm 349 DW 0x2000 350 #endasm 351 #pragma updateBank exit=UserBank_01 352 } 353 354 #define startCapture_address 0x3879 355 #pragma origin startCapture_address 356 void startCapture() 357 { 358 #asm 359 DW 0x2000 360 #endasm 361 #pragma updateBank exit=UserBank_01 362 } 363 364 #define captureTicks_address 0x387c 365 #pragma origin captureTicks_address 366 void captureTicks() 367 { 368 #asm 369 DW 0x2000 370 #endasm 371 #pragma updateBank exit=UserBank_01 372 } 373 374 #define waitNewTick_address 0x3882 375 #pragma origin waitNewTick_address 376 void waitNewTick() 377 { 378 #asm 379 DW 0x2000 380 #endasm 381 #pragma updateBank exit=UserBank_01 382 } 383 384 #define enableSPI_address 0x3885 385 #pragma origin enableSPI_address 386 void enableSPI() 387 { 388 #asm 389 DW 0x2000 390 #endasm 391 #pragma updateBank exit=UserBank_01 392 } 393 394 #define disableSPI_address 0x3888 395 #pragma origin disableSPI_address 396 void disableSPI() 397 { 398 #asm 399 DW 0x2000 400 #endasm 401 #pragma updateBank exit=UserBank_01 402 } 403 404 #define startSPI_address 0x388b 405 #pragma origin startSPI_address 406 void startSPI(uns8 length @ W) 407 { 408 #asm 409 DW 0x2000 410 #endasm 411 #pragma updateBank exit=UserBank_01 412 } 413 414 #define stopSPI_address 0x388e 415 #pragma origin stopSPI_address 416 void stopSPI() 417 { 418 #asm 419 DW 0x2000 420 #endasm 421 #pragma updateBank exit=UserBank_01 422 } 423 424 #define restartSPI_address 0x3891 425 #pragma origin restartSPI_address 426 void restartSPI() 427 { 428 #asm 429 DW 0x2000 430 #endasm 431 #pragma updateBank exit=UserBank_01 432 } 433 434 #define getStatusSPI_address 0x3894 435 #pragma origin getStatusSPI_address 436 bit getStatusSPI() 437 { 438 #asm 439 DW 0x2000 440 #endasm 441 #pragma updateBank exit=UserBank_01 442 return Carry; 443 } 444 445 #define setRFpower_address 0x3897 446 #pragma origin setRFpower_address 447 void setRFpower(uns8 level @ W) 448 { 449 #asm 450 DW 0x2000 451 #endasm 452 #pragma updateBank exit=UserBank_01 453 } 454 455 #define setLEDG_address 0x389a 456 #pragma origin setLEDG_address 457 void setLEDG() 458 { 459 #asm 460 DW 0x2000 461 #endasm 462 #pragma updateBank exit=UserBank_01 463 } 464 465 #define setRFchannel_address 0x389d 466 #pragma origin setRFchannel_address 467 void setRFchannel(uns8 channel @ W) 468 { 469 #asm 470 DW 0x2000 471 #endasm 472 #pragma updateBank exit=UserBank_01 473 } 474 475 #define setRFmode_address 0x38a0 476 #pragma origin setRFmode_address 477 void setRFmode(uns8 mode @ W) 478 { 479 #asm 480 DW 0x2000 481 #endasm 482 #pragma updateBank exit=UserBank_01 483 } 484 485 #define setRFspeed_address 0x38a3 486 #pragma origin setRFspeed_address 487 void setRFspeed(uns8 speed @ W) 488 { 489 #asm 490 DW 0x2000 491 #endasm 492 #pragma updateBank exit=UserBank_01 493 } 494 495 #define setRFsleep_address 0x38a6 496 #pragma origin setRFsleep_address 497 void setRFsleep() 498 { 499 #asm 500 DW 0x2000 501 #endasm 502 #pragma updateBank exit=UserBank_01 503 } 504 505 #define setRFready_address 0x38a9 506 #pragma origin setRFready_address 507 void setRFready() 508 { 509 #asm 510 DW 0x2000 511 #endasm 512 #pragma updateBank exit=UserBank_01 513 } 514 515 #define RFTXpacket_address 0x38ac 516 #pragma origin RFTXpacket_address 517 void RFTXpacket() 518 { 519 #asm 520 DW 0x2000 521 #endasm 522 #pragma updateBank exit=UserBank_01 523 } 524 525 #define RFRXpacket_address 0x38af 526 #pragma origin RFRXpacket_address 527 bit RFRXpacket() 528 { 529 #asm 530 DW 0x2000 531 #endasm 532 #pragma updateBank exit=UserBank_01 533 return Carry; 534 } 535 536 #define checkRF_address 0x38b2 537 #pragma origin checkRF_address 538 bit checkRF(uns8 level @ W) 539 { 540 #asm 541 DW 0x2000 542 #endasm 543 #pragma updateBank exit=UserBank_01 544 return Carry; 545 } 546 547 #define amIBonded_address 0x38b8 548 #pragma origin amIBonded_address 549 bit amIBonded() 550 { 551 #asm 552 DW 0x2000 553 #endasm 554 #pragma updateBank exit=UserBank_01 555 return Carry; 556 } 557 558 #define removeBond_address 0x38bb 559 #pragma origin removeBond_address 560 void removeBond() 561 { 562 #asm 563 DW 0x2000 564 #endasm 565 #pragma updateBank exit=UserBank_01 566 } 567 568 #define bondNewNode_address 0x38be 569 #pragma origin bondNewNode_address 570 bit bondNewNode(uns8 address @ W) 571 { 572 #asm 573 DW 0x2000 574 #endasm 575 #pragma updateBank exit=UserBank_01 576 return Carry; 577 } 578 579 #define isBondedNode_address 0x38c1 580 #pragma origin isBondedNode_address 581 bit isBondedNode(uns8 node @ W) 582 { 583 #asm 584 DW 0x2000 585 #endasm 586 #pragma updateBank exit=UserBank_01 587 return Carry; 588 } 589 590 #define removeBondedNode_address 0x38c4 591 #pragma origin removeBondedNode_address 592 void removeBondedNode(uns8 node @ W) 593 { 594 #asm 595 DW 0x2000 596 #endasm 597 #pragma updateBank exit=UserBank_01 598 } 599 600 #define rebondNode_address 0x38c7 601 #pragma origin rebondNode_address 602 bit rebondNode(uns8 node @ W) 603 { 604 #asm 605 DW 0x2000 606 #endasm 607 #pragma updateBank exit=UserBank_01 608 return Carry; 609 } 610 611 #define clearAllBonds_address 0x38ca 612 #pragma origin clearAllBonds_address 613 void clearAllBonds() 614 { 615 #asm 616 DW 0x2000 617 #endasm 618 #pragma updateBank exit=UserBank_01 619 } 620 621 #define setNonetMode_address 0x38cd 622 #pragma origin setNonetMode_address 623 void setNonetMode() 624 { 625 #asm 626 DW 0x2000 627 #endasm 628 #pragma updateBank exit=UserBank_01 629 } 630 631 #define setCoordinatorMode_address 0x38d0 632 #pragma origin setCoordinatorMode_address 633 void setCoordinatorMode() 634 { 635 #asm 636 DW 0x2000 637 #endasm 638 #pragma updateBank exit=UserBank_01 639 } 640 641 #define setNodeMode_address 0x38d3 642 #pragma origin setNodeMode_address 643 void setNodeMode() 644 { 645 #asm 646 DW 0x2000 647 #endasm 648 #pragma updateBank exit=UserBank_01 649 } 650 651 #define setNetworkFilteringOn_address 0x38d6 652 #pragma origin setNetworkFilteringOn_address 653 void setNetworkFilteringOn() 654 { 655 #asm 656 DW 0x2000 657 #endasm 658 #pragma updateBank exit=UserBank_01 659 } 660 661 #define setNetworkFilteringOff_address 0x38d9 662 #pragma origin setNetworkFilteringOff_address 663 void setNetworkFilteringOff() 664 { 665 #asm 666 DW 0x2000 667 #endasm 668 #pragma updateBank exit=UserBank_01 669 } 670 671 #define getNetworkParams_address 0x38dc 672 #pragma origin getNetworkParams_address 673 uns8 getNetworkParams() 674 { 675 #asm 676 DW 0x2000 677 #endasm 678 #pragma updateBank exit=UserBank_01 679 return 1; 680 } 681 682 #define setRoutingOn_address 0x38df 683 #pragma origin setRoutingOn_address 684 void setRoutingOn() 685 { 686 #asm 687 DW 0x2000 688 #endasm 689 #pragma updateBank exit=UserBank_01 690 } 691 692 #define setRoutingOff_address 0x38e2 693 #pragma origin setRoutingOff_address 694 void setRoutingOff() 695 { 696 #asm 697 DW 0x2000 698 #endasm 699 #pragma updateBank exit=UserBank_01 700 } 701 702 #define answerSystemPacket_address 0x38e8 703 #pragma origin answerSystemPacket_address 704 void answerSystemPacket() 705 { 706 #asm 707 DW 0x2000 708 #endasm 709 #pragma updateBank exit=UserBank_01 710 } 711 712 #define discovery_address 0x38eb 713 #pragma origin discovery_address 714 uns8 discovery(uns8 MaxNodeAddress @ W) 715 { 716 #asm 717 DW 0x2000 718 #endasm 719 #pragma updateBank exit=UserBank_01 720 return 1; 721 } 722 723 #define wasRouted_address 0x38ee 724 #pragma origin wasRouted_address 725 bit wasRouted() 726 { 727 #asm 728 DW 0x2000 729 #endasm 730 #pragma updateBank exit=UserBank_01 731 return Carry; 732 } 733 734 #define optimizeHops_address 0x38f1 735 #pragma origin optimizeHops_address 736 bit optimizeHops(uns8 method @ W) 737 { 738 #asm 739 DW 0x2000 740 #endasm 741 #pragma updateBank exit=UserBank_01 742 return Carry; 743 } 744 745 #define getSupplyVoltage_address 0x38f4 746 #pragma origin getSupplyVoltage_address 747 uns8 getSupplyVoltage() 748 { 749 #asm 750 DW 0x2000 751 #endasm 752 #pragma updateBank exit=UserBank_01 753 return 1; 754 } 755 756 #define getTemperature_address 0x38f7 757 #pragma origin getTemperature_address 758 int8 getTemperature() 759 { 760 #asm 761 DW 0x2000 762 #endasm 763 #pragma updateBank exit=UserBank_01 764 return W; 765 } 766 767 #define clearBufferRF_address 0x38fa 768 #pragma origin clearBufferRF_address 769 void clearBufferRF() 770 { 771 #asm 772 DW 0x2000 773 #endasm 774 #pragma updateBank exit=UserBank_01 775 } 776 777 #define isDiscoveredNode_address 0x3910 778 #pragma origin isDiscoveredNode_address 779 bit isDiscoveredNode(uns8 address @ W) 780 { 781 #asm 782 DW 0x2000 783 #endasm 784 #pragma updateBank exit=UserBank_01 785 return Carry; 786 } 787 788 #define enableRFPGM_address 0x3913 789 #pragma origin enableRFPGM_address 790 void enableRFPGM() 791 { 792 #asm 793 DW 0x2000 794 #endasm 795 #pragma updateBank exit=UserBank_01 796 } 797 798 #define disableRFPGM_address 0x3916 799 #pragma origin disableRFPGM_address 800 void disableRFPGM() 801 { 802 #asm 803 DW 0x2000 804 #endasm 805 #pragma updateBank exit=UserBank_01 806 } 807 808 #define setupRFPGM_address 0x3919 809 #pragma origin setupRFPGM_address 810 void setupRFPGM(uns8 x @ W) 811 { 812 #asm 813 DW 0x2000 814 #endasm 815 #pragma updateBank exit=UserBank_01 816 } 817 818 #define runRFPGM_address 0x391c 819 #pragma origin runRFPGM_address 820 void runRFPGM() 821 { 822 #asm 823 DW 0x2000 824 #endasm 825 #pragma updateBank exit=UserBank_01 826 } 827 828 #define iqrfDeepSleep_address 0x391f 829 #pragma origin iqrfDeepSleep_address 830 void iqrfDeepSleep() 831 { 832 #asm 833 DW 0x2000 834 #endasm 835 #pragma updateBank exit=UserBank_01 836 } 837 838 #define wasRFICrestarted_address 0x3922 839 #pragma origin wasRFICrestarted_address 840 uns8 wasRFICrestarted() 841 { 842 #asm 843 DW 0x2000 844 #endasm 845 #pragma updateBank exit=UserBank_01 846 return 1; 847 } 848 849 #define eeeWriteData_address 0x3925 850 #pragma origin eeeWriteData_address 851 bit eeeWriteData(uns16 address @ param3) 852 { 853 #asm 854 DW 0x2000 855 #endasm 856 #pragma updateBank exit=UserBank_01 857 return Carry; 858 } 859 860 #define eeeReadData_address 0x3928 861 #pragma origin eeeReadData_address 862 bit eeeReadData(uns16 address @ param3) 863 { 864 #asm 865 DW 0x2000 866 #endasm 867 #pragma updateBank exit=UserBank_01 868 return Carry; 869 } 870 871 #define setINDF0_address 0x3931 872 #pragma origin setINDF0_address 873 void setINDF0(uns8 value @ W) 874 { 875 #asm 876 DW 0x2000 877 #endasm 878 #pragma updateBank exit=UserBank_01 879 } 880 881 #define setINDF1_address 0x3934 882 #pragma origin setINDF1_address 883 void setINDF1(uns8 value @ W) 884 { 885 #asm 886 DW 0x2000 887 #endasm 888 #pragma updateBank exit=UserBank_01 889 } 890 891 #define getRSSI_address 0x3937 892 #pragma origin getRSSI_address 893 uns8 getRSSI() 894 { 895 #asm 896 DW 0x2000 897 #endasm 898 #pragma updateBank exit=UserBank_01 899 return 1; 900 } 901 902 #define removeBondAddress_address 0x393a 903 #pragma origin removeBondAddress_address 904 void removeBondAddress() 905 { 906 #asm 907 DW 0x2000 908 #endasm 909 #pragma updateBank exit=UserBank_01 910 } 911 912 #define sendFRC_address 0x393d 913 #pragma origin sendFRC_address 914 uns8 sendFRC(uns8 command @ W) 915 { 916 #asm 917 DW 0x2000 918 #endasm 919 #pragma updateBank exit=UserBank_01 920 return 1; 921 } 922 923 #define responseFRC_address 0x3940 924 #pragma origin responseFRC_address 925 void responseFRC() 926 { 927 #asm 928 DW 0x2000 929 #endasm 930 #pragma updateBank exit=UserBank_01 931 } 932 933 #define bondRequestAdvanced_address 0x3943 934 #pragma origin bondRequestAdvanced_address 935 bit bondRequestAdvanced() 936 { 937 #asm 938 DW 0x2000 939 #endasm 940 #pragma updateBank exit=UserBank_01 941 return Carry; 942 } 943 944 #define prebondNodeAtNode_address 0x3946 945 #pragma origin prebondNodeAtNode_address 946 bit prebondNodeAtNode() 947 { 948 #asm 949 DW 0x2000 950 #endasm 951 #pragma updateBank exit=UserBank_01 952 return Carry; 953 } 954 955 #define nodeAuthorization_address 0x3949 956 #pragma origin nodeAuthorization_address 957 bit nodeAuthorization(uns8 address @ W) 958 { 959 #asm 960 DW 0x2000 961 #endasm 962 #pragma updateBank exit=UserBank_01 963 return Carry; 964 } 965 966 #define dummy01_address 0x394c 967 #pragma origin dummy01_address 968 void dummy01() 969 { 970 #asm 971 DW 0x2000 972 #endasm 973 #pragma updateBank exit=UserBank_01 974 } 975 976 #define setAccessPassword_address 0x3958 977 #pragma origin setAccessPassword_address 978 void setAccessPassword() 979 { 980 #asm 981 DW 0x2000 982 #endasm 983 #pragma updateBank exit=UserBank_01 984 } 985 986 #define setUserKey_address 0x395b 987 #pragma origin setUserKey_address 988 void setUserKey() 989 { 990 #asm 991 DW 0x2000 992 #endasm 993 #pragma updateBank exit=UserBank_01 994 } 995 996 #define amIRecipientOfFRC_address 0x3961 997 #pragma origin amIRecipientOfFRC_address 998 bit amIRecipientOfFRC() 999 { 1000 #asm 1001 DW 0x2000 1002 #endasm 1003 #pragma updateBank exit=UserBank_01 1004 return Carry; 1005 } 1006 1007 #define setLEDR_address 0x3964 1008 #pragma origin setLEDR_address 1009 void setLEDR() 1010 { 1011 #asm 1012 DW 0x2000 1013 #endasm 1014 #pragma updateBank exit=UserBank_01 1015 } 1016 1017 #define encryptBufferRF_address 0x3967 1018 #pragma origin encryptBufferRF_address 1019 void encryptBufferRF(uns8 blocks @ W) 1020 { 1021 #asm 1022 DW 0x2000 1023 #endasm 1024 #pragma updateBank exit=UserBank_01 1025 } 1026 1027 #define decryptBufferRF_address 0x396a 1028 #pragma origin decryptBufferRF_address 1029 void decryptBufferRF(uns8 blocks @ W) 1030 { 1031 #asm 1032 DW 0x2000 1033 #endasm 1034 #pragma updateBank exit=UserBank_01 1035 } 1036 1037 #define prebondNodeAtCoordinator_address 0x396d 1038 #pragma origin prebondNodeAtCoordinator_address 1039 bit prebondNodeAtCoordinator(uns8 address @ W) 1040 { 1041 #asm 1042 DW 0x2000 1043 #endasm 1044 #pragma updateBank exit=UserBank_01 1045 return Carry; 1046 } 1047 1048 #define setFSRs_address 0x3970 1049 #pragma origin setFSRs_address 1050 uns8 setFSRs(uns8 fsrs @ W) 1051 { 1052 #asm 1053 DW 0x2000 1054 #endasm 1055 #pragma updateBank exit=UserBank_01 1056 return 1; 1057 } 1058 1059 // For internal usage only 1060 #define updateCRC16_address 0x3973 1061 #pragma origin updateCRC16_address 1062 void updateCRC16(uns8 value @ W) 1063 { 1064 #asm 1065 DW 0x2000 1066 #endasm 1067 #pragma updateBank exit=UserBank_01 1068 } 1069 1070 #define smartConnect_address 0x3976 1071 #pragma origin smartConnect_address 1072 bit smartConnect(uns8 address @ W) 1073 { 1074 #asm 1075 DW 0x2000 1076 #endasm 1077 #pragma updateBank exit=UserBank_01 1078 return Carry; 1079 } 1080 1081 #define addressBitmap_address 0x3979 1082 #pragma origin addressBitmap_address 1083 uns8 addressBitmap(uns8 bitIndex @ W) 1084 { 1085 #asm 1086 DW 0x2000 1087 #endasm 1088 #pragma updateBank exit=UserBank_01 1089 return 1; 1090 } 1091 1092 #define setServiceChannel_address 0x397c 1093 #pragma origin setServiceChannel_address 1094 bit setServiceChannel(uns8 channelNumber @ W) 1095 { 1096 #asm 1097 DW 0x2000 1098 #endasm 1099 #pragma updateBank exit=UserBank_01 1100 return 1; 1101 } 1102 1103 #pragma optimize 1 1104 #pragma update_RP 1 1105 #pragma update_PAGE 1 1106 #pragma origin __APPLICATION_ADDRESS