1 // ********************************************************************* 2 // IQRF OS functions * 3 // ********************************************************************* 4 // Intended for: 5 // OS: v4.02D 6 // 7 // Online IQRF OS Reference Guide: http://www.iqrf.org/IQRF-OS-Reference-guide/ 8 // 9 // Copyright (c) IQRF Tech s.r.o. 10 // 11 // File: IQRF-functions.h 12 // Version: v1.00 Revision: 22/08/2017 13 // 14 // Revision history: 15 // v1.00: 22/08/2017 First release for OS 4.02D. 16 // 17 // ********************************************************************* 18 19 #pragma optimize 0 20 #pragma update_PAGE 0 21 #pragma update_RP 0 22 23 #pragma origin 0x3810 24 void dummy() 25 { 26 #asm 27 DW 0x2000 28 #endasm 29 #pragma updateBank exit=UserBank_01 30 } 31 32 #pragma origin 0x3816 33 void iqrfSleep() 34 { 35 #asm 36 DW 0x2000 37 #endasm 38 #pragma updateBank exit=UserBank_01 39 } 40 41 #pragma origin 0x3819 42 void _debug() 43 { 44 #asm 45 DW 0x2000 46 #endasm 47 #pragma updateBank exit=UserBank_01 48 } 49 50 #define debug() \ 51 do { \ 52 _debug(); \ 53 nop(); \ 54 } while (0) 55 56 #pragma origin 0x381c 57 void moduleInfo() 58 { 59 #asm 60 DW 0x2000 61 #endasm 62 #pragma updateBank exit=UserBank_01 63 } 64 65 #pragma origin 0x3822 66 void pulsingLEDR() 67 { 68 #asm 69 DW 0x2000 70 #endasm 71 #pragma updateBank exit=UserBank_01 72 } 73 74 #pragma origin 0x3825 75 void pulseLEDR() 76 { 77 #asm 78 DW 0x2000 79 #endasm 80 #pragma updateBank exit=UserBank_01 81 } 82 83 #pragma origin 0x3828 84 void stopLEDR() 85 { 86 #asm 87 DW 0x2000 88 #endasm 89 #pragma updateBank exit=UserBank_01 90 } 91 92 #pragma origin 0x382b 93 void pulsingLEDG() 94 { 95 #asm 96 DW 0x2000 97 #endasm 98 #pragma updateBank exit=UserBank_01 99 } 100 101 #pragma origin 0x382e 102 void pulseLEDG() 103 { 104 #asm 105 DW 0x2000 106 #endasm 107 #pragma updateBank exit=UserBank_01 108 } 109 110 #pragma origin 0x3831 111 void stopLEDG() 112 { 113 #asm 114 DW 0x2000 115 #endasm 116 #pragma updateBank exit=UserBank_01 117 } 118 119 #pragma origin 0x3834 120 void setOnPulsingLED(uns8 ticks @ W) 121 { 122 #asm 123 DW 0x2000 124 #endasm 125 #pragma updateBank exit=UserBank_01 126 } 127 128 #pragma origin 0x3837 129 void setOffPulsingLED(uns8 ticks @ W) 130 { 131 #asm 132 DW 0x2000 133 #endasm 134 #pragma updateBank exit=UserBank_01 135 } 136 137 #pragma origin 0x383a 138 uns8 eeReadByte(uns8 address @ W) 139 { 140 #asm 141 DW 0x2000 142 #endasm 143 #pragma updateBank exit=UserBank_01 144 return 1; 145 } 146 147 #pragma origin 0x383d 148 bit eeReadData(uns8 address @ param2, uns8 length @ W) 149 { 150 #asm 151 DW 0x2000 152 #endasm 153 #pragma updateBank exit=UserBank_01 154 return Carry; 155 } 156 157 #pragma origin 0x3840 158 void eeWriteByte(uns8 address @ param2, uns8 data @ W) 159 { 160 #asm 161 DW 0x2000 162 #endasm 163 #pragma updateBank exit=UserBank_01 164 } 165 166 #pragma origin 0x3843 167 void eeWriteData(uns8 address @ param2, uns8 length @ W) 168 { 169 #asm 170 DW 0x2000 171 #endasm 172 #pragma updateBank exit=UserBank_01 173 } 174 175 #pragma origin 0x3846 176 uns8 readFromRAM(uns16 address @ FSR0) 177 { 178 #asm 179 DW 0x2000 180 #endasm 181 #pragma updateBank exit=UserBank_01 182 return 1; 183 } 184 185 #pragma origin 0x384c 186 void clearBufferINFO() 187 { 188 #asm 189 DW 0x2000 190 #endasm 191 #pragma updateBank exit=UserBank_01 192 } 193 194 #pragma origin 0x384f 195 void swapBufferINFO() 196 { 197 #asm 198 DW 0x2000 199 #endasm 200 #pragma updateBank exit=UserBank_01 201 } 202 203 #pragma origin 0x3852 204 bit compareBufferINFO2RF(uns8 length @ W) 205 { 206 #asm 207 DW 0x2000 208 #endasm 209 #pragma updateBank exit=UserBank_01 210 return Carry; 211 } 212 213 #pragma origin 0x3855 214 void copyBufferINFO2COM() 215 { 216 #asm 217 DW 0x2000 218 #endasm 219 #pragma updateBank exit=UserBank_01 220 } 221 222 #pragma origin 0x3858 223 void copyBufferINFO2RF() 224 { 225 #asm 226 DW 0x2000 227 #endasm 228 #pragma updateBank exit=UserBank_01 229 } 230 231 #pragma origin 0x385b 232 void copyBufferRF2COM() 233 { 234 #asm 235 DW 0x2000 236 #endasm 237 #pragma updateBank exit=UserBank_01 238 } 239 240 #pragma origin 0x385e 241 void copyBufferRF2INFO() 242 { 243 #asm 244 DW 0x2000 245 #endasm 246 #pragma updateBank exit=UserBank_01 247 } 248 249 #pragma origin 0x3861 250 void copyBufferCOM2RF() 251 { 252 #asm 253 DW 0x2000 254 #endasm 255 #pragma updateBank exit=UserBank_01 256 } 257 258 #pragma origin 0x3864 259 void copyBufferCOM2INFO() 260 { 261 #asm 262 DW 0x2000 263 #endasm 264 #pragma updateBank exit=UserBank_01 265 } 266 267 #pragma origin 0x3867 268 void copyMemoryBlock(uns16 from @ FSR0, uns16 to @ FSR1, uns8 length @ W) 269 { 270 #asm 271 DW 0x2000 272 #endasm 273 #pragma updateBank exit=UserBank_01 274 } 275 276 #pragma origin 0x386a 277 void startDelay(uns8 ticks @ W) 278 { 279 #asm 280 DW 0x2000 281 #endasm 282 #pragma updateBank exit=UserBank_01 283 } 284 285 #pragma origin 0x386d 286 void startLongDelay(uns16 ticks @ param3) 287 { 288 #asm 289 DW 0x2000 290 #endasm 291 #pragma updateBank exit=UserBank_01 292 } 293 294 #pragma origin 0x3870 295 bit isDelay() 296 { 297 #asm 298 DW 0x2000 299 #endasm 300 #pragma updateBank exit=UserBank_01 301 return Carry; 302 } 303 304 #pragma origin 0x3873 305 void waitDelay(uns8 ticks @ W) 306 { 307 #asm 308 DW 0x2000 309 #endasm 310 #pragma updateBank exit=UserBank_01 311 } 312 313 #pragma origin 0x3876 314 void waitMS(uns8 ms @ W) 315 { 316 #asm 317 DW 0x2000 318 #endasm 319 #pragma updateBank exit=UserBank_01 320 } 321 322 #pragma origin 0x3879 323 void startCapture() 324 { 325 #asm 326 DW 0x2000 327 #endasm 328 #pragma updateBank exit=UserBank_01 329 } 330 331 #pragma origin 0x387c 332 void captureTicks() 333 { 334 #asm 335 DW 0x2000 336 #endasm 337 #pragma updateBank exit=UserBank_01 338 } 339 340 #pragma origin 0x3882 341 void waitNewTick() 342 { 343 #asm 344 DW 0x2000 345 #endasm 346 #pragma updateBank exit=UserBank_01 347 } 348 349 #pragma origin 0x3885 350 void enableSPI() 351 { 352 #asm 353 DW 0x2000 354 #endasm 355 #pragma updateBank exit=UserBank_01 356 } 357 358 #pragma origin 0x3888 359 void disableSPI() 360 { 361 #asm 362 DW 0x2000 363 #endasm 364 #pragma updateBank exit=UserBank_01 365 } 366 367 #pragma origin 0x388b 368 void startSPI(uns8 length @ W) 369 { 370 #asm 371 DW 0x2000 372 #endasm 373 #pragma updateBank exit=UserBank_01 374 } 375 376 #pragma origin 0x388e 377 void stopSPI() 378 { 379 #asm 380 DW 0x2000 381 #endasm 382 #pragma updateBank exit=UserBank_01 383 } 384 385 #pragma origin 0x3891 386 void restartSPI() 387 { 388 #asm 389 DW 0x2000 390 #endasm 391 #pragma updateBank exit=UserBank_01 392 } 393 394 #pragma origin 0x3894 395 bit getStatusSPI() 396 { 397 #asm 398 DW 0x2000 399 #endasm 400 #pragma updateBank exit=UserBank_01 401 return Carry; 402 } 403 404 #pragma origin 0x3897 405 void setRFpower(uns8 level @ W) 406 { 407 #asm 408 DW 0x2000 409 #endasm 410 #pragma updateBank exit=UserBank_01 411 } 412 413 #pragma origin 0x389d 414 void setRFchannel(uns8 channel @ W) 415 { 416 #asm 417 DW 0x2000 418 #endasm 419 #pragma updateBank exit=UserBank_01 420 } 421 422 #pragma origin 0x38a0 423 void setRFmode(uns8 mode @ W) 424 { 425 #asm 426 DW 0x2000 427 #endasm 428 #pragma updateBank exit=UserBank_01 429 } 430 431 #pragma origin 0x38a3 432 void setRFspeed(uns8 speed @ W) 433 { 434 #asm 435 DW 0x2000 436 #endasm 437 #pragma updateBank exit=UserBank_01 438 } 439 440 #pragma origin 0x38a6 441 void setRFsleep() 442 { 443 #asm 444 DW 0x2000 445 #endasm 446 #pragma updateBank exit=UserBank_01 447 } 448 449 #pragma origin 0x38a9 450 void setRFready() 451 { 452 #asm 453 DW 0x2000 454 #endasm 455 #pragma updateBank exit=UserBank_01 456 } 457 458 #pragma origin 0x38ac 459 void RFTXpacket() 460 { 461 #asm 462 DW 0x2000 463 #endasm 464 #pragma updateBank exit=UserBank_01 465 } 466 467 #pragma origin 0x38af 468 bit RFRXpacket() 469 { 470 #asm 471 DW 0x2000 472 #endasm 473 #pragma updateBank exit=UserBank_01 474 return Carry; 475 } 476 477 #pragma origin 0x38b2 478 bit checkRF(uns8 level @ W) 479 { 480 #asm 481 DW 0x2000 482 #endasm 483 #pragma updateBank exit=UserBank_01 484 return Carry; 485 } 486 487 #pragma origin 0x38b8 488 bit amIBonded() 489 { 490 #asm 491 DW 0x2000 492 #endasm 493 #pragma updateBank exit=UserBank_01 494 return Carry; 495 } 496 497 #pragma origin 0x38bb 498 void removeBond() 499 { 500 #asm 501 DW 0x2000 502 #endasm 503 #pragma updateBank exit=UserBank_01 504 } 505 506 #pragma origin 0x38be 507 bit bondNewNode(uns8 address @ W) 508 { 509 #asm 510 DW 0x2000 511 #endasm 512 #pragma updateBank exit=UserBank_01 513 return Carry; 514 } 515 516 #pragma origin 0x38c1 517 bit isBondedNode(uns8 node @ W) 518 { 519 #asm 520 DW 0x2000 521 #endasm 522 #pragma updateBank exit=UserBank_01 523 return Carry; 524 } 525 526 #pragma origin 0x38c4 527 void removeBondedNode(uns8 node @ W) 528 { 529 #asm 530 DW 0x2000 531 #endasm 532 #pragma updateBank exit=UserBank_01 533 } 534 535 #pragma origin 0x38c7 536 bit rebondNode(uns8 node @ W) 537 { 538 #asm 539 DW 0x2000 540 #endasm 541 #pragma updateBank exit=UserBank_01 542 return Carry; 543 } 544 545 #pragma origin 0x38ca 546 void clearAllBonds() 547 { 548 #asm 549 DW 0x2000 550 #endasm 551 #pragma updateBank exit=UserBank_01 552 } 553 554 #pragma origin 0x38cd 555 void setNonetMode() 556 { 557 #asm 558 DW 0x2000 559 #endasm 560 #pragma updateBank exit=UserBank_01 561 } 562 563 #pragma origin 0x38d0 564 void setCoordinatorMode() 565 { 566 #asm 567 DW 0x2000 568 #endasm 569 #pragma updateBank exit=UserBank_01 570 } 571 572 #pragma origin 0x38d3 573 void setNodeMode() 574 { 575 #asm 576 DW 0x2000 577 #endasm 578 #pragma updateBank exit=UserBank_01 579 } 580 581 #pragma origin 0x38d6 582 void setNetworkFilteringOn() 583 { 584 #asm 585 DW 0x2000 586 #endasm 587 #pragma updateBank exit=UserBank_01 588 } 589 590 #pragma origin 0x38d9 591 void setNetworkFilteringOff() 592 { 593 #asm 594 DW 0x2000 595 #endasm 596 #pragma updateBank exit=UserBank_01 597 } 598 599 #pragma origin 0x38dc 600 uns8 getNetworkParams() 601 { 602 #asm 603 DW 0x2000 604 #endasm 605 #pragma updateBank exit=UserBank_01 606 return 1; 607 } 608 609 #pragma origin 0x38df 610 void setRoutingOn() 611 { 612 #asm 613 DW 0x2000 614 #endasm 615 #pragma updateBank exit=UserBank_01 616 } 617 618 #pragma origin 0x38e2 619 void setRoutingOff() 620 { 621 #asm 622 DW 0x2000 623 #endasm 624 #pragma updateBank exit=UserBank_01 625 } 626 627 #pragma origin 0x38e8 628 void answerSystemPacket() 629 { 630 #asm 631 DW 0x2000 632 #endasm 633 #pragma updateBank exit=UserBank_01 634 } 635 636 #pragma origin 0x38eb 637 uns8 discovery(uns8 MaxNodeAddress @ W) 638 { 639 #asm 640 DW 0x2000 641 #endasm 642 #pragma updateBank exit=UserBank_01 643 return 1; 644 } 645 646 #pragma origin 0x38ee 647 bit wasRouted() 648 { 649 #asm 650 DW 0x2000 651 #endasm 652 #pragma updateBank exit=UserBank_01 653 return Carry; 654 } 655 656 #pragma origin 0x38f1 657 bit optimizeHops(uns8 method @ W) 658 { 659 #asm 660 DW 0x2000 661 #endasm 662 #pragma updateBank exit=UserBank_01 663 return Carry; 664 } 665 666 #pragma origin 0x38f4 667 uns8 getSupplyVoltage() 668 { 669 #asm 670 DW 0x2000 671 #endasm 672 #pragma updateBank exit=UserBank_01 673 return 1; 674 } 675 676 #pragma origin 0x38f7 677 int8 getTemperature() 678 { 679 #asm 680 DW 0x2000 681 #endasm 682 #pragma updateBank exit=UserBank_01 683 return W; 684 } 685 686 #pragma origin 0x38fa 687 void clearBufferRF() 688 { 689 #asm 690 DW 0x2000 691 #endasm 692 #pragma updateBank exit=UserBank_01 693 } 694 695 #pragma origin 0x3910 696 bit isDiscoveredNode(uns8 address @ W) 697 { 698 #asm 699 DW 0x2000 700 #endasm 701 #pragma updateBank exit=UserBank_01 702 return Carry; 703 } 704 705 #pragma origin 0x3913 706 void enableRFPGM() 707 { 708 #asm 709 DW 0x2000 710 #endasm 711 #pragma updateBank exit=UserBank_01 712 } 713 714 #pragma origin 0x3916 715 void disableRFPGM() 716 { 717 #asm 718 DW 0x2000 719 #endasm 720 #pragma updateBank exit=UserBank_01 721 } 722 723 #pragma origin 0x3919 724 void setupRFPGM(uns8 x @ W) 725 { 726 #asm 727 DW 0x2000 728 #endasm 729 #pragma updateBank exit=UserBank_01 730 } 731 732 #pragma origin 0x391c 733 void runRFPGM() 734 { 735 #asm 736 DW 0x2000 737 #endasm 738 #pragma updateBank exit=UserBank_01 739 } 740 741 #pragma origin 0x391f 742 void iqrfDeepSleep() 743 { 744 #asm 745 DW 0x2000 746 #endasm 747 #pragma updateBank exit=UserBank_01 748 } 749 750 #pragma origin 0x3922 751 uns8 wasRFICrestarted() 752 { 753 #asm 754 DW 0x2000 755 #endasm 756 #pragma updateBank exit=UserBank_01 757 return 1; 758 } 759 760 #pragma origin 0x3925 761 bit eeeWriteData(uns16 address @ param3) 762 { 763 #asm 764 DW 0x2000 765 #endasm 766 #pragma updateBank exit=UserBank_01 767 return Carry; 768 } 769 770 #pragma origin 0x3928 771 bit eeeReadData(uns16 address @ param3) 772 { 773 #asm 774 DW 0x2000 775 #endasm 776 #pragma updateBank exit=UserBank_01 777 return Carry; 778 } 779 780 #pragma origin 0x3931 781 void setINDF0(uns8 value @ W) 782 { 783 #asm 784 DW 0x2000 785 #endasm 786 #pragma updateBank exit=UserBank_01 787 } 788 789 #pragma origin 0x3934 790 void setINDF1(uns8 value @ W) 791 { 792 #asm 793 DW 0x2000 794 #endasm 795 #pragma updateBank exit=UserBank_01 796 } 797 798 #pragma origin 0x3937 799 uns8 getRSSI() 800 { 801 #asm 802 DW 0x2000 803 #endasm 804 #pragma updateBank exit=UserBank_01 805 return 1; 806 } 807 808 #pragma origin 0x393a 809 void removeBondAddress() 810 { 811 #asm 812 DW 0x2000 813 #endasm 814 #pragma updateBank exit=UserBank_01 815 } 816 817 #pragma origin 0x393d 818 uns8 sendFRC(uns8 command @ W) 819 { 820 #asm 821 DW 0x2000 822 #endasm 823 #pragma updateBank exit=UserBank_01 824 return 1; 825 } 826 827 #pragma origin 0x3940 828 void responseFRC() 829 { 830 #asm 831 DW 0x2000 832 #endasm 833 #pragma updateBank exit=UserBank_01 834 } 835 836 #pragma origin 0x3943 837 bit bondRequestAdvanced() 838 { 839 #asm 840 DW 0x2000 841 #endasm 842 #pragma updateBank exit=UserBank_01 843 return Carry; 844 } 845 846 #pragma origin 0x3946 847 bit prebondNodeAtNode() 848 { 849 #asm 850 DW 0x2000 851 #endasm 852 #pragma updateBank exit=UserBank_01 853 return Carry; 854 } 855 856 #pragma origin 0x3949 857 bit nodeAuthorization(uns8 address @ W) 858 { 859 #asm 860 DW 0x2000 861 #endasm 862 #pragma updateBank exit=UserBank_01 863 return Carry; 864 } 865 866 #pragma origin 0x394c 867 void dummy01() 868 { 869 #asm 870 DW 0x2000 871 #endasm 872 #pragma updateBank exit=UserBank_01 873 } 874 875 #pragma origin 0x3958 876 void setAccessPassword() 877 { 878 #asm 879 DW 0x2000 880 #endasm 881 #pragma updateBank exit=UserBank_01 882 } 883 884 #pragma origin 0x395b 885 void setUserKey() 886 { 887 #asm 888 DW 0x2000 889 #endasm 890 #pragma updateBank exit=UserBank_01 891 } 892 893 #pragma origin 0x3961 894 bit amIRecipientOfFRC() 895 { 896 #asm 897 DW 0x2000 898 #endasm 899 #pragma updateBank exit=UserBank_01 900 return Carry; 901 } 902 903 #pragma origin 0x3967 904 void encryptBufferRF(uns8 blocks @ W) 905 { 906 #asm 907 DW 0x2000 908 #endasm 909 #pragma updateBank exit=UserBank_01 910 } 911 912 #pragma origin 0x396a 913 void decryptBufferRF(uns8 blocks @ W) 914 { 915 #asm 916 DW 0x2000 917 #endasm 918 #pragma updateBank exit=UserBank_01 919 } 920 921 #pragma origin 0x396d 922 bit prebondNodeAtCoordinator(uns8 address @ W) 923 { 924 #asm 925 DW 0x2000 926 #endasm 927 #pragma updateBank exit=UserBank_01 928 return Carry; 929 } 930 931 #pragma origin 0x3970 932 uns8 setFSRs(uns8 fsrs @ W) 933 { 934 #asm 935 DW 0x2000 936 #endasm 937 #pragma updateBank exit=UserBank_01 938 return 1; 939 } 940 941 // For internal usage only 942 #pragma origin 0x3973 943 void updateCRC16(uns8 value @ W) 944 { 945 #asm 946 DW 0x2000 947 #endasm 948 #pragma updateBank exit=UserBank_01 949 } 950 951 #pragma optimize 1 952 #pragma update_RP 1 953 #pragma update_PAGE 1 954 #pragma origin __APPLICATION_ADDRESS